KSZ8842-PMBL Micrel Inc, KSZ8842-PMBL Datasheet - Page 107

2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface ( )

KSZ8842-PMBL

Manufacturer Part Number
KSZ8842-PMBL
Description
2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8842-PMBL

Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LFBGA
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1636 - BOARD EVALUATION KSZ8842-PMQL
Current - Supply
-
Lead Free Status / RoHS Status
Supplier Unconfirmed, Lead free / RoHS Compliant
Other names
576-3089

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Company
Part Number
Manufacturer
Quantity
Price
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KSZ8842-PMBL
Manufacturer:
TI
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Manufacturer:
Micrel Inc
Quantity:
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Part Number:
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0
Part Number:
KSZ8842-PMBL AM
Manufacturer:
Micrel
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Part Number:
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Manufacturer:
Micrel Inc
Quantity:
10 000
Micrel, Inc.
Dynamic MAC Address Table
The Dynamic MAC address is a read only table.
Example:
Dynamic MAC Address Table Read (read the first entry at indirect address offset 0 and retrieve the MAC table size)
October 2007
Then
70 – 67
65 – 56
55 – 54
53 – 52
51 – 48
47 – 0
Bit
71
66
Write to reg. IACR with 0x1800 (set indirect address and trigger a read dynamic MAC table operation)
Read reg. IADR1 (dynamic MAC table bits 71-64) // If bit 71 =1, restart (reread) from this register
Read reg. IADR3 (dynamic MAC table bits 63-48)
Read reg. IADR2 (dynamic MAC table bits 47-32)
Read reg. IADR5 (dynamic MAC table bits 31-16)
Read reg. IADR4 (dynamic MAC table bits 15-0)
0x000_0000_0000
00_0000_0000
Default
0x0
00
1
Table 13. Dynamic MAC Address Table Format (1024 Entries)
R/W
RO
RO
RO
RO
RO
RO
RO
RO
Description
Data not ready
1 = specifies that the entry is not ready, continue retrying until bit is
set to 0
0 = specifies that the entry is ready
Reserved
MAC empty
1 = specifies that there is no valid entry in the table
0 = specifies that there are valid entries in the table
No of valid entries
Indicates how many valid entries in the table
0x3ff means 1 K entries
0x001 means 2 entries
0x000 and bit 66 = 0 means 1 entry
0x000 and bit 66 = 1 means 0 entry
Time Stamp
Specifies the 2-bit counter for internal aging.
Source port
Identifies the source port where FID+MAC is learned:
00, port 1
01, port 2
10, port 3
FID
Specifies the filter ID.
MAC Address
Specifies the 48-bit MAC address.
107
KSZ8842-PMQL/PMBL
M9999-100207-1.5

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