KSZ8842-PMBL Micrel Inc, KSZ8842-PMBL Datasheet - Page 97

• Manufacturer Part Number: KSZ8842-PMBL
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3089

Micrel, Inc.
Host VID Control Register (Offset 0x0544): P3VIDCR
This register contains the global per port control for the switch host port function.
Host Control Register 3 (Offset 0x0546): P3CR3
This register contains the host port control register for the switch host port function.
October 2007
Note: P3VIDCR serve two purposes:
15-13
15 – 5
11-0
Bit
12
3-2
Bit
4
1
0
(1) Associated with the ingress untagged packets, and used for egress tagging.
(2) Default VID for the ingress untagged or null-VID-tagged packets, and used for address look up.
Default
Default
0x001
000
000
00
0
0
0
0
Reserved
Reserved
R/W
RW
RW
RW
Name
0
0
0
Description
User Priority bits
Host Port default tag bits [15-13] for user priority
CFI bit
Host Port default tag bit 12 for CFI
VID bits
Host Port default tag bits [11-0] for VID
R/W
RW
RW
RW
RO
Description
Reserved
Ingress Limit Mode
These bits determine what kinds of frames are limited and
counted against Ingress limiting as follows:
00 = Limit and count all frames
01 = Limit and count Broadcast, Multicast, and flooded
unicast frames
10 = Limit and count Broadcast and Multicast frames only
11 = Limit and count Broadcast frames only
Count IFG bytes
1 = each frame’s minimum inter frame gap (IFG) bytes (12
per frame) are included in Ingress and Egress rate limiting
calculations.
0 = IFG bytes are not counted
Count Preamble bytes
1 = each frame’s preamble bytes (8 per frame) are included
in Ingress and Egress rate limiting calculations.
0 = preamble bytes are not counted
97
KSZ8842-PMQL/PMBL
M9999-100207-1.5