CYII4SM1300AA-QDC Cypress Semiconductor Corp, CYII4SM1300AA-QDC Datasheet - Page 22

• Manufacturer Part Number: CYII4SM1300AA-QDC
• Description: SENSOR IMAGE MONO CMOS 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII4SM1300AA-QDC

• Package / Case: 84-LCC
• Pixel Size: 7µm² x 7µm²
• Active Pixel Array: 1286H x 1030V
• Frames Per Second: 7
• Voltage - Supply: 5V
• Operating Supply Voltage: 5 V
• Image Size: 1280 H x 1024 V
• Color Sensing: Black/White
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: IBIS4-1300-M-2; IBIS4-1300-M-2

Table 9. Timing Constraints on Row Initialization Pulses Sequence
Document Number: 38-05707 Rev. *C
Tm
Tw
Th
Tn
Ta
Tc
Ts
To
Tr
SYNC_YR
SYNC_YL
SYNC_X
CLK_YR
CLK YL
CLOCK_X
RESET
SHY
SIN
L/R
Typ. 200 ns
Min. 200 ns
Typ 100 ns
Min 25 ns
Min 25 ns
Typ. 3 µs
Typ. 1 µs
Typ 1 µs
Min 0
Figure 18. Timing Constraints for Row Readout Initialization (Blanking Time)
Tc
On-time of one of the SYNC pulses. SYNC==low may only occur when the associated CLOCK is
Delay between selection of new row and end of column amplifier calibration
Ts
Th + Tr = Delay between pixel reset and column sample & hold
Delay between falling edge of CLK_Y* and SHY or SIN
Tw
Delay between SHY and start row readout
On-time of SIN (offset calibration pulse)
Delay between end SIN and pixel reset
Overlap of L/R\ over 2nd reset pulse
CLK_YR & CLK_YL high time
Delay between SHY and L/R\
Tr
On-time of reset pulse
high.
Th
To
Tn
To
Tr
Tm
CYII4SM1300AA
To
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