CYIL2SC1300AA-GZDC Cypress Semiconductor Corp, CYIL2SC1300AA-GZDC Datasheet - Page 10

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CYIL2SC1300AA-GZDC

Manufacturer Part Number
CYIL2SC1300AA-GZDC
Description
IMAGE SENSOR CMOS LUPA-1300-2
Manufacturer
Cypress Semiconductor Corp
Type
CMOS Imagingr
Datasheet

Specifications of CYIL2SC1300AA-GZDC

Pixel Size
14µm x 14µm
Active Pixel Array
1280H x 1024V
Frames Per Second
500
Voltage - Supply
2.5V, 3.3V
Package / Case
168-PGA
Package
168CuPGA
Image Size
1280x1024 Pixels
Color Sensing
Color
Operating Temperature
0 to 70 °C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Non Destructive Readout (NDR)
The sensor can also be read out in a nondestructive method. After a pixel is initially reset, it can be read multiple times, without being
reset. You can record the initial reset level and all intermediate signals. High light levels saturate the pixels quickly, but a useful signal
is obtained from the early samples. For low light levels, the later or latest samples must be used. Essentially, an active pixel array is
read multiple times, and reset only once. The external system intelligence interprets the data.
advantages and disadvantages of nondestructive readout.
Table 12. Advantages and Disadvantages of Non Destructive Readout
Note that the amount of samples taken with one initial reset is programmable in the nr_of_ndr_steps register. If nr_of_ndr_steps is
one, the sensor operates in the default method, that is one reset and one sample. This is called the disable nondestructive read out
mode.
When nr_of_ndr_steps is two, there is one reset and two samples, and so on. In the slave mode, nothing changes on the protocol of
the signals int_time_*. The sequencer suppresses the internal reset signal to the pixel array.
Sequencer
The sequencer generates the complete internal timing of the pixel array and the readout. The timing can be controlled by the user
through the SPI register settings. The sequencer operates on the same clock as the data block. This is a division by 10 of the input
clock (internally divided).
Table 13
page 15.
Table 13. Internal Registers
Document Number: 001-24599 Rev. *C
Low noise, because it is true CDS
High sensitivity. The conversion capacitance is kept low.
High dynamic range. The results include signals for short and
long integration times.
MBS (reserved) Fix1
Block
lists the internal registers. These registers are discussed in detail in the section
Fix2
Fix3
Fix4
Fix5
Register Name
Advantages
Address [6..0]
Figure 8. Principle of Non Destructive Readout
0
1
2
3
4
Field
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
System memory required to record the reset level and the
intermediate samples
Requires multiples readings of each pixel, so there is higher data
throughput
Requires system level digital calculations
0x00
0xFF
0x00
0x00
‘0x08’
Reset Value
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Reserved, fixed value
Detailed Description of Internal Registers
Disadvantages
Table 12
Description
time
CYIL2SM1300AA
on page 10 summarizes the
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