ADNS-2220 Avago Technologies US Inc., ADNS-2220 Datasheet - Page 14

• Manufacturer Part Number: ADNS-2220
• Description: SOLID STATE OPTICAL MOUSE LENS
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-2220

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q2072083A

Figure 14. Idd vs. Frame Rate
Synchronous Serial Port
The synchronous serial port is used to set and read pa-
rameters in the ADNS-3060, and to read out the motion
information. The serial port is also used to load SROM
data into the ADNS-3060.
The port is a four-wire, serial port. The host micro-con-
troller always initiates communication; the ADNS-3060
never initiates data transfers. The serial port cannot be
activated while the chip is in power down mode (NPD
low) or reset (RESET high). SCLK, MOSI, and NCS may be
driven directly by a 3.3V output from a micro-controller,
or they may be placed in an open drain configuration by
enabling on-chip pull-up current sources. The open drain
drive allows the use of a 5V micro-controller without any
level shifting components. The port pins may be shared
with other SPI slave devices. When the NCS pin is high,
the inputs are ignored and the output is tri-stated.
The lines which comprise the SPI port are:
SCLK:
MOSI:
MISO:
NCS:
NCS needs to be low to activate the serial port; otherwise,
MISO will be high-Z, and MOSI & SCLK will be ignored.
NCS can also be used to reset the serial port in case of
an error.
14
120%
100%
80%
60%
40%
20%
0%
0
51%
Clock input. It is always generated by the master
(the micro- controller).
Input data (Master Out/Slave In).
Output data (Master In/Slave Out).
Chip select input (active low).
55%
2000
Average Supply Current vs Frame Rate
VDD=3.6V, Regulator Bypass Mode
72%
Frame Rate (Hz)
4000
88%
6000
Chip Select Operation
The serial port is activated after NCS goes low. If NCS
is raised during a transaction, the entire transaction is
aborted and the serial port will be reset. This is true
for all transactions including SROM download. After a
transaction is aborted, the normal address-to-data or
transaction-to-transaction delay is still required before
beginning the next transaction. To improve communica-
tion reliability, all serial transactions should be framed by
NCS. In other words, the port should not remain enabled
during periods of non-use because ESD and EFT/B events
could be interpreted as serial communication and put
the chip into an unknown state. In addition, NCS must
be raised after each burst-mode transaction is complete
to terminate burst-mode. The port is not available for
further use until burst-mode is terminated.
100%
8000