COM20019I3V-DZD SMSC, COM20019I3V-DZD Datasheet - Page 33
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COM20019I3V-DZD
Manufacturer Part Number
COM20019I3V-DZD
Description
Network Controller & Processor ICs ARCNET Contrllr
Manufacturer
SMSC
Datasheet
1.COM20019I3V-HT.pdf
(70 pages)
Specifications of COM20019I3V-DZD
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
312.5 Kbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Supply Current (max)
25 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
PLCC-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SMSC COM20019I 3.3V
Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
7-3
2,1,0
7
6
5
BIT
BIT
Reserved
Sub Address 2,1,0
Reset
Command
Chaining Enable
Transmit Enable
BIT NAME
BIT NAME
SUBAD
2,1,0
RESET
CCHEN
TXEN
SYMBOL
SYMBOL
Table 6.9 - Configuration Register
Table 6.8 - Sub Address Register
These bits are undefined. They must be 0.
These bits determine which register at address 07 may be
accessed. The combinations are as follows:
SUBAD2
SUBAD1 and SUBAD0 are exactly the same as exist in the
Configuration Register. SUBAD2 is cleared automatically by
writing the Configuration Register.
A software reset of the COM20019I 3V is executed by
writing a logic "1" to this bit. A software reset does not reset
the microcontroller interface mode, nor does it affect the
Configuration Register. The only registers that the software
reset affect are the Status Register, the Next ID Register,
and the Diagnostic Status Register. This bit must be
brought back to logic "0" to release the reset.
This bit, if high, enables the Command Chaining operation
of the device. Please refer to the Command Chaining
section for further details. A low level on this bit ensures
software compatibility with previous SMSC ARCNET
devices.
When low, this bit disables transmissions by keeping
nPULSE1, nPULSE2 if in non-Backplane Mode, and nTXEN
pin inactive. When high, it enables the above signals to be
activated during transmissions. This bit defaults low upon
reset. This bit is typically enabled once the Node ID is
determined, and never disabled during normal operation.
Please refer to the Improved Diagnostics section for details
on evaluating network activity.
DATASHEET
0
0
0
0
1
1
1
1
Page 33
SUBAD1 SUBAD0
0
0
1
1
0
0
1
1
DESCRIPTION
DESCRIPTION
0
1
0
1
0
1
0
1
Register
Tentative ID \ (Same
Node ID
Setup 1
Next ID
Setup 2
Reserved
Reserved
Reserved
\ as in
/ Config
/ Register)
Rev. 11-07-08