AD9912/PCBZ Analog Devices Inc, AD9912/PCBZ Datasheet - Page 4
![Eval Board](/photos/9/29/92970/ad9912_pcbz_sml.jpg)
AD9912/PCBZ
Manufacturer Part Number
AD9912/PCBZ
Description
Eval Board
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Specifications of AD9912/PCBZ
Kit Features
Flexible System Clock I/P Accepts Crystal
Supported Devices
AD9912
Tool / Board Applications
Direct Digital Synthesizer
Development Tool Type
Hardware - Eval/Demo Board
Mcu Supported Families
AD9912
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9912
Primary Attributes
14-Bit DAC, 48-Bit Tuning Word Width
Secondary Attributes
1GHz, Graphical User Interface
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
AD9912
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V ± 5%, AVDD3 = 3.3 V ± 5%, DVDD = 1.8 V ± 5%, DVDD_I/O = 3.3 V ± 5%, AVSS = 0 V, DVSS = 0 V, unless otherwise noted.
Table 1.
Parameter
SUPPLY VOLTAGE
SUPPLY CURRENT
LOGIC INPUTS (Except Pin 32)
CLKMODESEL (Pin 32) LOGIC INPUT
LOGIC OUTPUTS
FDBK_IN INPUT
DVDD_I/O (Pin 1)
DVDD (Pin 3, Pin 5, Pin 7)
AVDD3 (Pin 14, Pin 46, Pin 47, Pin 49)
AVDD3 (Pin 37)
AVDD (Pin 11, Pin 19, Pin 23 to Pin 26, Pin 29,
I
I
I
I
I
I
Input High Voltage (V
Input Low Voltage (V
Input Current (I
Maximum Input Capacitance (C
Input High Voltage (V
Input Low Voltage (V
Input Current (I
Maximum Input Capacitance (C
Output High Voltage (V
Output Low Voltage (V
Input Capacitance
Input Resistance
Differential Input Voltage Swing
AVDD3
AVDD3
AVDD
AVDD
DVDD
DVDD_I/O
Pin 30, Pin 36, Pin 42, Pin 44, Pin 45, Pin 53)
Pin 30, Pin 36, Pin 42, Pin 44, Pin 45)
(Pin 11, Pin 19, Pin 23 to Pin 26, Pin 29,
(Pin 53)
(Pin 3, Pin 5, Pin 7)
(Pin 37)
(Pin 46, Pin 47, Pin 49)
(Pin 1, Pin 14
INH
INH
, I
, I
INL
INL
1
IL
IL
)
)
)
IH
IH
)
)
OL
)
)
OH
)
)
IN
IN
)
)
Min
3.135
1.71
3.135
1.71
1.71
2.0
DVSS
1.4
AVSS
2.7
DVSS
18
225
Typ
3.30
1.80
3.30
3.30
1.80
8
26
113
40
205
2
±60
3
−18
3
3
22
Rev. F | Page 4 of 40
Max
3.465
1.89
3.465
3.465
1.89
9.6
31
136
48
246
3
DVDD_I/O
0.8
±200
AVDD
0.4
−50
DVDD_I/O
0.4
26
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
mA
V
V
μA
pF
V
V
μA
pF
V
V
pF
kΩ
mV p-p
Test Conditions/Comments
Pin 37 is typically 3.3 V but can be set to 1.8 V
See also the Total Power Dissipation
specifications
CMOS output driver at 3.3 V, 50 MHz, with
5 pF load
DAC output current source, f
Aggregate analog supply, with system
clock PLL, HSTL output driver, and S-divider
enabled
DAC power supply
Digital core (SpurKiller off )
Digital I/O (varies dynamically)
Pin 9, Pin 10, Pin 54, Pin 55, Pin 58 to Pin 61,
Pin 63, Pin 64
At V
Pin 32 only
At V
Pin 62 and the following bidirectional pins:
Pin 9, Pin 10, Pin 54, Pin 55, Pin 63
I
I
Pin 40, Pin 41
Differential
Equivalent to 112.5 mV swing on each leg;
must be ac-coupled
OH
OL
= 1 mA
= 1 mA
IN
IN
= 0 V and V
= 0 V and V
IN
IN
= DVDD_I/O
= AVDD
S
= 1 GSPS