FDD8453LZ Fairchild Semiconductor, FDD8453LZ Datasheet - Page 2

• Manufacturer Part Number: FDD8453LZ
• Description: MOSFET N-CH 40V 16.4A DPAK
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDD8453LZ

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 6.7 mOhm @ 15A, 10V
• Drain To Source Voltage (vdss): 40V
• Current - Continuous Drain (id) @ 25° C: 16.4A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 64nC @ 10V
• Input Capacitance (ciss) @ Vds: 3515pF @ 20V
• Power - Max: 3.1W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.0067 Ohm @ 10 V
• Drain-source Breakdown Voltage: 40 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 16.4 A
• Power Dissipation: 3100 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDD8453LZTR

©2007 Fairchild Semiconductor Corporation
FDD8453LZ Rev.C
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Notes:
1: R
2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3: Starting T
4: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
BV
∆BV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
∆V
DSS
GSS
d(on)
r
d(off)
f
rr
DS(on)
FS
GS(th)
SD
iss
oss
rss
g
∆T
∆T
g
g
gs
gd
rr
R
Symbol
DSS
θJA
θJC
GS(th)
DSS
J
J
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
is guaranteed by design while R
J
= 25
°
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C, L = 3mH, I
AS
= 13A, V
Parameter
θJA
DD
is determined by the user’s board design.
= 40V, V
T
a)
GS
J
1 in
= 25°C unless otherwise noted
40°C/W when mounted on a
= 10V.
2
pad of 2 oz copper
V
V
V
V
V
f = 1MHz
f = 1MHz
V
I
V
V
V
T
V
V
V
I
I
I
V
V
D
F
D
D
DD
GS
GS
GS
GS
GS
GS
GS
J
DS
DS
GS
GS
DS
GS
= 15A, di/dt = 100A/µs
= 250µA, referenced to 25°C
= 250µA, V
= 250µA, referenced to 25°C
= 125°C
= 0V to 10V
= 0V to 5V
= 20V, V
= 20V, I
= 10V, R
= 5V, I
= 0V, I
= 0V, I
= 32V, V
= V
= 10V, I
= 4.5V, I
= 10V, I
= ±20V, V
2
DS
Test Conditions
, I
D
S
S
D
D
D
D
D
= 15A
= 2.0A
= 15A
GS
GEN
GS
GS
= 15A,
= 15A
= 15A,
= 250µA
DS
= 13A
= 0V,
= 0V
= 0V
= 0V
= 6Ω
V
I
D
DD
= 15A
(Note 2)
(Note 2)
= 20V,
b)
96°C/W
on a minimum pad.
Min
1.0
40
when
2640
-6.0
320
190
mounted
0.7
0.8
2.3
Typ
1.8
5.8
6.8
9.1
25
20
37
46
24
77
11
36
6
5
7
8
3515
10.6
Max
425
285
1.2
1.3
±10
3.0
6.7
8.7
19
12
58
10
64
33
40
32
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1
mV/°C
mV/°C
Units
mΩ
nC
pF
pF
pF
nC
nC
nC
nC
µA
µA
ns
ns
ns
ns
ns
Ω
V
V
S
V