85310AYI-11LF Integrated Device Technology (Idt), 85310AYI-11LF Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/3/333/integrated_device_technology__idt__sml.jpg)
85310AYI-11LF
Manufacturer Part Number
85310AYI-11LF
Description
Clock Driver 2-IN ECL/LVPECL 32-Pin LQFP Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.85310AYI-11LF.pdf
(18 pages)
Specifications of 85310AYI-11LF
Package
32LQFP
Configuration
1 x 2:1
Input Signal Type
HCSL|LVDS|LVHSTL|LVPECL|SSTL
Maximum Output Frequency
700 MHz
Operating Supply Voltage
-2.5|-3.3|3.3 V
ICS85310I-11 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS5311I-01.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS5311I-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (single layer or multi-layer).
Table 6. Thermal Resistance
ICS85310AYI-11 REVISION F JUNE 9, 2010
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power Dissipation.
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 10 * 30mW = 300mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.756W * 42.1°C/W = 116.8°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.8V, with all outputs switching) = 456mW + 300mW = 756mW
MAX
MAX
= V
= 30mW/Loaded Output pair
CC_MAX
θ
JA
* I
for 32 Lead LQFP, Forced Convection
EE_MAX
CC
= 3.8V, which gives worst case results.
JA
= 3.8V * 120mA = 456mW
* Pd_total + T
θ
JA
67.8°C/W
47.9°C/W
A
by Velocity
0
LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER
12
55.9°C/W
42.1°C/W
200
JA
must be used. Assuming a moderate air
©2010 Integrated Device Technology, Inc.
50.1°C/W
39.4°C/W
500