82V3280EQG Integrated Device Technology (Idt), 82V3280EQG Datasheet - Page 126
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82V3280EQG
Manufacturer Part Number
82V3280EQG
Description
WAN PLL 100-Pin TQFP Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.IDT82V3280DQG8.pdf
(171 pages)
Specifications of 82V3280EQG
Package
100TQFP
Operating Temperature
-40 to 85 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
82V3280EQG
Manufacturer:
IDT
Quantity:
20 000
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T0_BW_OVERSHOOT_CNFG - T0 DPLL Bandwidth Overshoot Configuration
Programming Information
IDT82V3280
Address: 59H
Type: Read / Write
Default Value: 1XXX1XXX
AUTO_BW_SEL
6 - 4
2 - 0
Bit
7
3
7
AUTO_BW_SEL
T0_LIMT
Name
-
-
6
-
This bit determines whether starting or acquisition bandwidth / damping factor is used for T0 DPLL.
0: The starting and acquisition bandwidths / damping factors are not used. Only the locked bandwidth / damping factor is used
regardless of the T0 DPLL locking stage.
1: The starting, acquisition or locked bandwidth / damping factor is used automatically depending on different T0 DPLL locking
stages. (default)
Reserved.
This bit determines whether the integral path value is frozen when the T0 DPLL hard limit is reached.
0: Not frozen.
1: Frozen. It will minimize the subsequent overshoot when T0 DPLL is pulling in. (default)
Reserved.
5
-
4
-
126
T0_LIMT
3
Description
2
-
1
-
December 9, 2008
0
-
WAN PLL
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