ATTINY12L-4PU Atmel, ATTINY12L-4PU Datasheet - Page 39

• Manufacturer Part Number: ATTINY12L-4PU
• Description: MCU 8-Bit ATtiny AVR RISC 1KB Flash 3.3V/5V 8-Pin PDIP
• Manufacturer: Atmel

Specifications of ATTINY12L-4PU

• Package: 8PDIP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 6
• Interface Type: SPI
• Number Of Timers: 1
• Program Memory Size: 1 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C
• Processor Series: ATTINY1x
• Core: AVR8
• Maximum Clock Frequency: 4 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Details

Timer/Counter0
Timer/Counter Prescaler
1006F–AVR–06/07
The ATtiny11/12 provides one general-purpose 8-bit Timer/Counter – Timer/Counter0.
The Timer/Counter0 has prescaling selection from the 10-bit prescaling timer. The
Timer/Counter0 can either be used as a timer with an internal clock timebase or as a
counter with an external pin connection that triggers the counting.
Figure 22 shows the Timer/Counter prescaler.
Figure 22. Timer/Counter0 Prescaler
The four different prescaled selections are: CK/8, CK/64, CK/256 and CK/1024 where
CK is the oscillator clock. CK, external source and stop, can also be selected as clock
sources.
Figure 23 shows the block diagram for Timer/Counter0.
The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK, or an external
pin. In addition, it can be stopped as described in the specification for the
Timer/Counter0 Control Register – TCCR0. The overflow status flag is found in the
Timer/Counter Interrupt Flag Register – TIFR. Control signals are found in the
Timer/Counter0 Control Register – TCCR0. The interrupt enable/disable settings for
Timer/Counter0 are found in the Timer/Counter Interrupt Mask Register – TIMSK.
When Timer/Counter0 is externally clocked, the external signal is synchronized with the
oscillator frequency of the CPU. To ensure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 8-bit Timer/Counter0 features both a high-resolution and a high-accuracy usage
with the lower prescaling opportunities. Similarly, the high-prescaling opportunities
make the Timer/Counter0 useful for lower-speed functions or exact-timing functions with
infrequent actions.
CS00
CS01
CS02
T0
CK
TIMER/COUNTER0 CLOCK SOURCE
0
10-BIT T/C PRESCALER
TCK0
ATtiny11/12
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