92HD81B1C5NLGXUAX Integrated Device Technology (Idt), 92HD81B1C5NLGXUAX Datasheet - Page 25

• Manufacturer Part Number: 92HD81B1C5NLGXUAX
• Description: Audio Codec 2ADC / 2DAC 24-Bit 48-Pin VFQFPN EP Tray
• Manufacturer: Integrated Device Technology (Idt)
• Type: General Purposer

Specifications of 92HD81B1C5NLGXUAX

• Package: 48VFQFPN EP
• Adc/dac Resolution: 24 Bit
• Number Of Channels: 2ADC /2 DAC
• Sampling Rate: 192 KSPS
• Number Of Dac Outputs: 8
• Number Of Dacs: 2
• Operating Supply Voltage: 1.5|1.8|3.3|4|4.75|5 V

92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
IDT™ CONFIDENTIAL
Power State DMIC Widget
Digital Mics
D1-D3
D0-D3
D0
D4
D5
0
1
2
3
4
one DMIC pin and
the second DMIC
either DMIC_0 or
Double Edge on
Double Edge on
Enabled?
Single Edge on
Double Edge
Data Sample
Single Edge
Yes
Yes
No
-
-
To conserve power, the analog portion of the ADC will be turned off if the D-mic input is selected.
When switching from the digital microphone to an analog input to the ADC, the analog portion of the
ADC will be brought back to a full power state and allowed to stabilize before switching from the dig-
ital microphone to the analog input. This should take less than 10mS.
DMIC pin widgets support port presence detect directly using SENSE-B input.
The codec supports the following digital microphone configurations:
N/A
pin.
1
Clock Capable Input Capable DMIC_CLK Output is Enabled when either DMIC_0 or
DMIC_CLK
Disabled
Disabled
Disabled
Disabled
Output
Clock
Clock
Clock
Clock
ADC Conn.
0, or 1
0, or 1
0, or 1
0, or 1
N/A
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
Input Disabled DMIC_CLK is HIGH-Z with Weak Pull-down
Connected to DMIC_0 and DMIC_1, External logic required to support
No Digital Microphones
Available on either DMIC_0 or DMIC_1
When using a microphone that supports multiplexed operation (2-mics
can share a common data line), configure the microphone for “Left” and
select mono operation using the vendor specific verb.
“Left” D-mic data is used for ADC left and right channels.
Available on either DMIC_0 or DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second
Digital Mic right channel on falling edge of DMIC_CLK for those digital
microphones that don’t support alternative clock edge (multiplexed output)
capability.
Requires both DMIC_0 and DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second
Digital Mic right channel on falling edge of DMIC_CLK for those digital
microphones that don’t support alternative clock edge (multiplexed output)
capability. Two ADC units are required to support this configuration
sampling on a single Digital Mic pin channel on rising edge and second
Digital Mic right channel on falling edge of DMIC_CLK for those digital
microphones that don’t support alternative clock edge capability. Two
ADC units are required to support this configuration
DMIC_0,1
25
DMIC_1 Input Widget is Enabled. Otherwise, the
DMIC_CLK remains Low
Notes
Notes
V 0.987 11/09
92HD81