92HD81B1C5NLGXUAX Integrated Device Technology (Idt), 92HD81B1C5NLGXUAX Datasheet - Page 75
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92HD81B1C5NLGXUAX
Manufacturer Part Number
92HD81B1C5NLGXUAX
Description
Audio Codec 2ADC / 2DAC 24-Bit 48-Pin VFQFPN EP Tray
Manufacturer
Integrated Device Technology (Idt)
Type
General Purposer
Datasheet
1.92HD81B1C5NLGXUAX.pdf
(289 pages)
Specifications of 92HD81B1C5NLGXUAX
Package
48VFQFPN EP
Adc/dac Resolution
24 Bit
Number Of Channels
2ADC /2 DAC
Sampling Rate
192 KSPS
Number Of Dac Outputs
8
Number Of Dacs
2
Operating Supply Voltage
1.5|1.8|3.3|4|4.75|5 V
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SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Rsvd
SDMSettleDisable
SDMCoeffSel
SDMLFHalf
SDMLFDisable
InvertValid
InvertData
Atten6dBDisable
Reg
Get
Set
7.4.21. AFG (NID = 01h): DACMode
Byte 4 (Bits 31:24)
Bits
31:8
Reserved.
7
SDM wait-to-settle disable:
1 = at mute, the SDM switches to the mute pattern immediately
0 = at mute, the SDM switches to the mute pattern after settling (can take up to
~45ms)
6
DAC SDM coefficient select (stages 1, 2, 3):
1 = 1/16, 1/2, 1/4
0 = 1/16, 1/4, 1/2
5
DAC SDM local feedback coefficient select: 1 = 1/4096, 0 = 1/2048.
4
DAC SDM local feedback disable: 1 = local feedback disabled, 0 = local feed-
back enabled.
3
DAC Valid Invert: 1 = 7.056MHz valid strobe is inverted, 0 = 7.056MHz valid
strobe is not inverted.
2
DAC Data Invert: 1 = 1-bit outputs are inverted, 0 = 1-bit outputs are not invert-
ed.
1
Disable built-in -6dB digital attenuation: 1 = -6dB disabled, 0 = -6dB enabled.
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
RW
RW
RW
RW
F8000h
Default
000000h
0h
0h
0h
0h
0h
0h
0h
75
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR
POR
POR
POR
POR
POR
POR
92HD81
Byte 1 (Bits 7:0)
780h
PC AUDIO
V 0.987 11/09
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