92HD81B1C5NLGXUAX Integrated Device Technology (Idt), 92HD81B1C5NLGXUAX Datasheet - Page 74

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92HD81B1C5NLGXUAX

Manufacturer Part Number
92HD81B1C5NLGXUAX
Description
Audio Codec 2ADC / 2DAC 24-Bit 48-Pin VFQFPN EP Tray
Manufacturer
Integrated Device Technology (Idt)
Type
General Purposer
Datasheet

Specifications of 92HD81B1C5NLGXUAX

Package
48VFQFPN EP
Adc/dac Resolution
24 Bit
Number Of Channels
2ADC /2 DAC
Sampling Rate
192 KSPS
Number Of Dac Outputs
8
Number Of Dacs
2
Operating Supply Voltage
1.5|1.8|3.3|4|4.75|5 V
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
OD0
Field Name
Rsvd
Mono1
Mono0
PhAdj
Rate
Reg
Get
Set
7.4.20. AFG (NID = 01h): DMic
Byte 4 (Bits 31:24)
Bits
0
GPIO0 Drive Mode: 0 = push-pull (drive 0 and 1); 1 = open-drain (drive 0, float
for 1).
Bits
31:6
Reserved.
5
DMic1 mono select: 0 = stereo operation, 1 = mono operation (left channel du-
plicated to the right channel).
4
DMic0 mono select: 0 = stereo operation, 1 = mono operation (left channel du-
plicated to the right channel).
3:2
Selects what phase of the DMic clock the data should be latched:
0h = left data rising edge/right data falling edge
1h = left data center of high/right data center of low
2h = left data falling edge/right data rising edge
3h = left data center of low/right data center of high
1:0
Selects the DMic clock rate:
0h = 4.704MHz
1h = 3.528MHz
2h = 2.352MHz
3h = 1.176MHz.
Byte 3 (Bits 23:16)
R/W
RW
R/W
R
RW
RW
RW
RW
F7800h
Default
0h
Default
0000000h
0h
0h
0h
2h
74
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR
POR
POR
POR
92HD81
Byte 1 (Bits 7:0)
778h
PC AUDIO
V 0.987 11/09

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