92HD81B1C5NLGXUAX Integrated Device Technology (Idt), 92HD81B1C5NLGXUAX Datasheet - Page 287

• Manufacturer Part Number: 92HD81B1C5NLGXUAX
• Description: Audio Codec 2ADC / 2DAC 24-Bit 48-Pin VFQFPN EP Tray
• Manufacturer: Integrated Device Technology (Idt)
• Type: General Purposer

Specifications of 92HD81B1C5NLGXUAX

• Package: 48VFQFPN EP
• Adc/dac Resolution: 24 Bit
• Number Of Channels: 2ADC /2 DAC
• Sampling Rate: 192 KSPS
• Number Of Dac Outputs: 8
• Number Of Dacs: 2
• Operating Supply Voltage: 1.5|1.8|3.3|4|4.75|5 V

SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
11. DOCUMENT REVISION HISTORY
Revision
92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
0.91
0.92
0.93
0.94
0.95
0.96
0.97
0.98
0.5
0.9
December 10, 2008 Corrected conflicting pin naming on pins 43 and 44.
January 25, 2008
October 27, 2008
January 12,2009
October 2, 2008
January 9, 2009
August 6, 2008
March 5, 2009
May 27, 2008
May 9, 2008
Date
Description of Change
Initial release
Added widget details.Integrated addendum sections into datasheet.
Removed low voltage part number, as not needed as the DVD_IO pin dynamically selects low
voltage (1.5V) or normal (3.3V) HDA bus signaling based on what voltage is on the pin
YA revision and beyond updates
AFGAnaCapless Verb changed for new charge pump clock controls, as well as new test bits
required by the analog
Corrected Mic Boost Voltages in Section 3.2
Updated to include Aux mode Section 2.22, “Aux Audio Support (92HD81B1X only)”, widget controls
added at Chapter 7.4.32, “AFG (NID = 01h): AuxAudio”
corrected part number mappings Section 1.2, “Orderable Part Numbers”
corrected device ID mappings Section 7.3.1, “Root (NID = 00h): RevID”
Updated 3 widget default values for YB revision
Chapter 7.4.28, “AFG (NID = 01h): AnaBTL YC and YD Revisions” TS Wait BITs 11:8, default 6h to
0h
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpFreqBypass BIT 12 default 1h to 0h
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpSplyDetOverride BIT 13 default 1h to
0h
Updated for the YC revision
Chapter 7.4.6, “AFG (NID = 01h): PwrStateCap” The LPD3Sup bit was renamed and default was
changed
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpFreqBypass BIT 12 default changed
Chapter 7.9.12, “PortE (NID = 0Eh): ConfigDefault” and Chapter 6.3, “Pin Configuration Default
Register Settings” Configuration default change
Updated for the WA revision
Chapter 7.4.30, “AFG (NID = 01h): AnaCapless” ChargePumpFreqBypass BIT 12 default changed,
changed m3dB field name to “Reserved” and changed p6dB field name to “AntiPopBypass.”
Removed WA items.
Please note YD revision has no changes in documentation from YC. All YC notes apply to YD.
Removed 3.3V Analog option. Contact IDT for more information.
• BTL amp gain settings added to Section 2.18, “BTL Amplifier”
• Corrected tables in Section 2.17, “EAPD”
• Widget Changes in AFG (NID = 01h)
• AFGEAPD changed to have separate control bits for BTL, HP-A and HP-B
• AFGAnaPort Verb changed to remove the GSMark control, and to provide Ports A and B
• AFGAnaBeep Verb changed to add more flexible modes of operation
• AFGAnaBTL Verb changed to add MaxVol field and remove +6db control. Other fields
with one power down control each, as opposed to each having a HP power down and a lin-
eout power down
shifted a bit to maintain logical grouping
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92HD81
PC AUDIO
V 0.987 11/09