MT46V128M8P-6T:A Micron Technology Inc, MT46V128M8P-6T:A Datasheet - Page 6

• Manufacturer Part Number: MT46V128M8P-6T:A
• Description: DRAM Chip DDR SDRAM 1G-Bit 128Mx8 2.5V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V128M8P-6T:A

• Density: 1 Gb
• Maximum Clock Rate: 333 MHz
• Package: 66TSOP
• Address Bus Width: 16 Bit
• Operating Supply Voltage: 2.5 V
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 1G (128M x 8)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Package / Case: 66-TSOP
• Organization: 128Mx8
• Address Bus: 16b
• Access Time (max): 700ps
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 230mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Functional Block Diagrams
Figure 3:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
1Gb_DDR_x4x8x16_D2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
BA0, BA1
A0–A13,
CAS#
RAS#
WE#
CKE
CK#
CS#
CK
16
Address
register
256 Meg x 4 Functional Block Diagram
Mode registers
Control
logic
16
counter
14
Refresh
The 1Gb DDR SDRAM is a high-speed CMOS, dynamic random access memory
containing 1,073,741,824 bits. It is internally configured as a 4-bank DRAM.
12
2
13
address
2
Row-
MUX
Column-
counter/
address
control
Bank
14
latch
logic
decoder
address
Bank 0
latch
row-
and
11
1
16,384
(16,384 x 2,048 x 8)
Sense amplifierS
DM mask logic
I/O gating
decoder
memory
Column
Bank 0
2048
array
6
Bank 1
Bank 2
(16,384)
Bank 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
8
8
8
READ
latch
out
CK
1Gb: x4, x8, x16 DDR SDRAM
CK
drivers
WRITE
FIFO
and
4
4
Functional Block Diagrams
CK
in
Column 0
MUX
Mask
Data
Column 0
8
2
1
1
4
4
generator
registers
©2003 Micron Technology, Inc. All rights reserved.
Input
DQS
4
1
1
4
4
Data
1
1
4
1
DQS
DRVRS
DLL
CK
RCVRS
DQ0–DQ3
DQS
DM