MT46V128M8P-6T:A Micron Technology Inc, MT46V128M8P-6T:A Datasheet - Page 74

• Manufacturer Part Number: MT46V128M8P-6T:A
• Description: DRAM Chip DDR SDRAM 1G-Bit 128Mx8 2.5V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V128M8P-6T:A

• Density: 1 Gb
• Maximum Clock Rate: 333 MHz
• Package: 66TSOP
• Address Bus Width: 16 Bit
• Operating Supply Voltage: 2.5 V
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 1G (128M x 8)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Package / Case: 66-TSOP
• Organization: 128Mx8
• Address Bus: 16b
• Access Time (max): 700ps
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 230mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 46:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
Command
BA0, BA1
Address
DQS
DQ
CK#
CKE
A10
DM
CK
5
t
t
IS
IS
Bank WRITE – Without Auto Precharge
NOP 1
T0
t
t
IH
IH
Notes:
t
t
Bank x
IS
IS
Row
Row
ACT
T1
1. NOP commands are shown for ease of illustration; other commands may be valid at these
2. BL = 4.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T8.
5. DI b = data-in from column b; subsequent elements are provided in the programmed order.
6. See Figure 48 on page 76 for detailed DQ timing.
t
t
IH
IH
times.
t
CK
t
t
RCD
RAS
NOP 1
T2
t
CH
t
CL
WRITE 2
t
Bank x
Col n
IS
3
T3
t
t
DQSS (NOM)
IH
t
WPRES
t DS
74
t
WPRE
NOP 1
T4
DI
b
t DH
T4n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DQSL
NOP 1
T5
t
DQSH
T5n
1Gb: x4, x8, x16 DDR SDRAM
t
WPST
NOP 1
T6
Transitioning Data
©2003 Micron Technology, Inc. All rights reserved.
t
NOP 1
WR
T7
Operations
One bank
All banks
Don’t Care
Bank x 4
T8
PRE
t
RP