OCX256LTB792 Fairchild Semiconductor, OCX256LTB792 Datasheet - Page 28

• Manufacturer Part Number: OCX256LTB792
• Manufacturer: Fairchild Semiconductor

Specifications of OCX256LTB792

• Number Of Arrays: 1
• Differential Data Transmission: Yes
• Power Supply Requirement: Single
• Mounting: Surface Mount
• Line Code: NRZ
• On-chip Buffers: Yes
• On-chip Decoder: No
• On-chip Latch Circuit: No
• On-chip Mux/demux: No
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Compliant

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Package and Pinout
Glossary
Clock: A single differential input used to gate data into reg-
isters in the Output Buffer. The input serves all outputs of
the OCX. The neighbor input can also be used as a register
clock.
Crosspoint: A single cell controlled by two RAM bits. The
RAM bits are connected in a master-slave configuration to
provide an update for programming and changing program
information all at once.
Crosspoint Array: An array of Crosspoint cells used to
connect any input port to any output port.
Input or Output Path: The signal flow from pin to array
and array to pin. Each path has a register with selectable
clocks, drivers for the loaded outputs with selectable
enables, and sense circuits to detect changes on either
side of the IO Buffer.
(Continued)
28
Next Neighbor: A physically adjacent port can be used as
a clock source for an output configured in registered mode.
These outputs are grouped in pairs such that the signal
being switched through Output 0 can be used to clock the
signal being switched through Output 1, or vice-versa. Any
single clock or data input signal can be used to clock any
other input signal provided they are switched to an appro-
priate output pair.
Port: A name followed by a number to identify a pin on the
device.
RapidConfigure: A parallel programming method for the
OCX devices. The RC mode uses 25 dedicated pins to pro-
gram the Crosspoint Array and the I/O Buffers. The 25 pins
consist of an enable, a clock, four instruction bits, two
seven-bit address fields, and a five-bit data field.
Preliminary