OCX256LTB792 Fairchild Semiconductor, OCX256LTB792 Datasheet - Page 4

• Manufacturer Part Number: OCX256LTB792
• Manufacturer: Fairchild Semiconductor

Specifications of OCX256LTB792

• Number Of Arrays: 1
• Differential Data Transmission: Yes
• Power Supply Requirement: Single
• Mounting: Surface Mount
• Line Code: NRZ
• On-chip Buffers: Yes
• On-chip Decoder: No
• On-chip Latch Circuit: No
• On-chip Mux/demux: No
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Compliant

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Introduction
Neighboring Output Port as a Clock Source
A physically adjacent port can be used as a clock source
for an output port configured in registered mode. These
outputs are grouped in pairs such that the signal being
switched through OUT0 can be used to clock the signal
being switched through OUT1, and vice versa. Any single
clock or data input signal can be used to clock any other
input signal provided they are switched to an appropriate
output pair (see Table 2). Figure 4 shows the implementa-
tion of next neighbor output port clocking in the OCX256
switch.
The advantages of next neighbor clocking are:
1. Using next neighbor clocking in the registered output
2. For a design with a large number of outputs switching
Only OUT1 can neighbor with OUT0, OUT3 with OUT2, etc. OUT2 cannot neighbor with OUT1, or OUT4 with OUT3, etc.
RapidConfigure Interface
RapidConfigure (RC) is a 25 signal parallel interface that is
used to program the OCX256 device. The 25 pins are allo-
cated as follows:
RCA[6:0]
RCB[6:0]
RCI[3:0]
RCO[4:0]
RC_CLK
RC_EN
(RO) mode helps reduce the skew in outgoing data.
simultaneously, next neighbor clocking mode is useful
RapidConfigure Address A.
RCA are input pins.
RapidConfigure Address B.
RCB are input pins.
RapidConfigure Instruction Bits
RapidConfigure Readback.
RCO are output pins.
RapidConfigure Clock
RapidConfigure Cycle Enable
(state is sensed on negative edge of clock)
Output Next Neighbor Pairs 0,1 2,3 4,5 6,7 8,9
(Continued)
Any Input
Any Input
(INx)
(INy)
Port
Port
FIGURE 4. Next Neighbor Clock Block Diagram
Crosspoint
Pairing Sequence for Neighboring Outputs
Array
TABLE 2. Next Neighbor Outputs
Neighbor
Neighbor
Next
Next
CLK
CLK
Select
Select
Clock
Clock
4
For example, INx is used for data input while INy is used
for the corresponding clock. INx is connected to OUT0 via
the crosspoint array while INy is connected to OUT1 via the
crosspoint array. OUT0 is configured in registered output
(RO) mode with OUT1 as its next neighbor clock selection.
OUT1 will output the clock signal as well as clock the data
in OUT0. Adjacent port selection is required for next neigh-
bor clocking in the registered output mode.
This feature is useful in many applications where different
types of data switching through the crosspoint array have
various associated clocks. To match the delays in the data
and corresponding clocks, it is common practice to pass
the clocks through the switch along with the data.
Note: Selecting the next neighbor clock for both outputs at the same time is
not recommended. Only one output in the pair at a time can be clocked by
its next neighbor.
RapidConfigure Programming Instructions
The RC interface supports both write and read types of
operations:
1. Write Operations (reset crosspoint and Input or Output
2. Read Operations (Output Buffer and crosspoint config-
D
D
to stagger outputs for reduced board noise caused by
simultaneous switching outputs.
Buffer (IOB), configure an Output Buffer, connect/dis-
connect crosspoint)
uration read)
Q
Q
Output Mode
Output Mode
Select
Select
OE
OE
• • • •
124,125 126,127
OUT0
OUT1
Preliminary