KS8993F A5 Micrel Inc, KS8993F A5 Datasheet - Page 16

KS8993F A5

Manufacturer Part Number
KS8993F A5
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8993F A5

Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
KS8993F
August 26, 2004
Pin #
101
102
103
104
105
106
107
Pin Name
PS0
PV31
PV32
PV21
PV23
DGND
VDDIO
Type
Ipd
Ipu
Ipu
Ipu
Ipu
Gnd
Pwr
Description
registers.
[PS1, PS0] = [0, 0] --- I2C master (EEPROM) mode
(If EEPROM is not detected, the power up default values of the
KS8993F internal registers will be used)
[PS1, PS0] = [0, 1] --- I2C slave mode
The external I2C master will drive the SCL clock.
The KS8993F device addresses are:
[PS1, PS0] = [1, 0] --- SPI slave mode
[PS1, PS0] = [1, 1] --- SMI mode
In this mode, the KS8993F provides access to all its internal 8 bit
registers thru its MDC and MDIO pins.
Note
Port 3 port based VLAN mask bits. Use to select which ports may
transmit packets received on port 3.
PV31 = 1, port 1 may transmit packets received on port 3.
PV31 = 0, port 1 will not transmit any packets received on port 3.
PV32 = 1, port 2 may transmit packets received on port 3.
PV32 = 0, port 2 will not transmit any packets received on port 3.
Port 2 port based VLAN mask bits. Use to select which ports may
transmit packets received on port 2.
PV21 = 1, port 1 may transmit packets received on port 2.
PV21 = 0, port 1 will not transmit any packets received on port 2.
PV23 = 1, port 3 may transmit packets received on port 2.
PV23 = 0, port 3 will not transmit any packets received on port 2.
Digital ground
3.3V or 2.5V digital VDD
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
When (PS1, PS0) ≠ (1,1), the KS8993F provides access to its 16
bit MIIM registers thru its MDC and MDIO pins.
1011_1111
1011_1110
- 16 -
<read>
<write>
Type
O
O
I/O
Ipu
Type
O
I
I/O
Ipu
Type
O
I
I
Ipu
Description
Not used. (tri-stated)
I2C clock
I2C data I/O
Not used.
Description
Not used. (tri-stated)
I2C clock
I2C data I/O
Not used.
Description
SPI Data Out
SPI clock
SPI Data In
SPI chip select
Revision 1.0
Micrel

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