KS8993F A5 Micrel Inc, KS8993F A5 Datasheet - Page 4

• Manufacturer Part Number: KS8993F A5
• Manufacturer: Micrel Inc

Specifications of KS8993F A5

• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

KS8993F
Table Of Contents
1 Signal Description .........................................................................................................................9
2 Functional Description ................................................................................................................20
3 MII Management (MIIM) Registers .............................................................................................47
August 26, 2004
1.1
1.2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10 Configuration Interface ......................................................................................................................................................... 41
KS8993F Pin Diagram............................................................................................................................................................ 9
Pin Description and I/O Assignment..................................................................................................................................... 10
Overview .............................................................................................................................................................................. 20
Media Converter Function .................................................................................................................................................... 20
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
Physical Transceiver ............................................................................................................................................................ 24
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.3.9
2.3.10 Auto Negotiation ...................................................................................................................................................... 29
MAC and Switch Function .................................................................................................................................................... 29
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.4.8
2.4.9
2.4.10 Illegal Frames .......................................................................................................................................................... 33
2.4.11 Flow Control............................................................................................................................................................. 33
2.4.12 Half Duplex Back Pressure ...................................................................................................................................... 34
2.4.13 Broadcast Storm Protection ..................................................................................................................................... 34
MII Interface Operation......................................................................................................................................................... 34
SNI (7-wire) Interface Operation........................................................................................................................................... 35
MII Management Interface (MIIM) ........................................................................................................................................ 36
Serial Management Interface (SMI)...................................................................................................................................... 36
Advanced Switch Function ................................................................................................................................................... 37
2.9.1
2.9.2
2.9.3
2.9.4
2.10.1 I
2.10.2 I
2.10.3 SPI Slave Serial Bus Configuration.......................................................................................................................... 43
Register 0: MII Basic Control............................................................................................................................................... 47
Register 1: MII Basic Status ................................................................................................................................................ 47
Register 2: PHYID HIGH ..................................................................................................................................................... 48
Register 3: PHYID LOW...................................................................................................................................................... 48
Register 4: Auto-Negotiation Advertisement Ability ............................................................................................................. 49
Register 5: Auto-Negotiation Link Partner Ability................................................................................................................. 49
OAM (Operations, Administration, and Management) Frame Format...................................................................... 20
MC (Media Converter) Mode ................................................................................................................................... 22
MC Loop Back Function........................................................................................................................................... 22
Registers for Media Converter Functions................................................................................................................. 23
Unique I/O Feature Definition .................................................................................................................................. 23
Port 1 LED Indicator Definition................................................................................................................................. 24
Port 2 LED Indicator Definition................................................................................................................................. 24
100BASE-TX Transmit ............................................................................................................................................ 24
100BASE-TX Receive.............................................................................................................................................. 25
PLL Clock Synthesizer............................................................................................................................................. 25
Scrambler/De-scrambler (100BASE-TX only) .......................................................................................................... 25
100BASE-FX Operation and Signal Detection ......................................................................................................... 25
100BASE-FX Far-End Fault (FEF) .......................................................................................................................... 26
10BASE-T Transmit and Receive ............................................................................................................................ 26
Power Management................................................................................................................................................. 26
Auto MDI/MDI-X Crossover ..................................................................................................................................... 26
Address Look Up ..................................................................................................................................................... 29
Learning................................................................................................................................................................... 29
Migration .................................................................................................................................................................. 30
Aging ....................................................................................................................................................................... 30
Forwarding............................................................................................................................................................... 30
Switching Engine ..................................................................................................................................................... 33
MAC operation......................................................................................................................................................... 33
Back-off Algorithm ................................................................................................................................................... 33
Late Collision ........................................................................................................................................................... 33
Port Mirroring Support.............................................................................................................................................. 37
IEEE 802.1Q VLAN support..................................................................................................................................... 38
QoS Priority ............................................................................................................................................................. 39
Rate Limit Support ................................................................................................................................................... 41
2
2
C Master Serial Bus Configuration......................................................................................................................... 42
C Slave Serial Bus Configuration........................................................................................................................... 43
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Revision 1.0
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