82P2282PF IDT, Integrated Device Technology Inc, 82P2282PF Datasheet - Page 294

• Manufacturer Part Number: 82P2282PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2282PF

• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

E1 Mode (062H, 162H)
XDIS:
E1-06AH,...).
SiDIS:
063H,...) respectively.
(b1, E1-063H,...) respectively.
mines how to replace the E bit (refer to the description of the FEBEDIS bit).
FEBEDIS:
how to replace the E bit.
CRCM, SIGEN, GENCRC:
FDIS:
Programming Information
IDT82P2282
FEBEDIS (b4, E1-062H,...)
Bit Name
Default
Bit No.
Type
This bit is valid when the Signaling Multi-frame is generated.
= 0: The Extra bits (the Bit 5, 7 & 8 of TS16 of Frame 0 of the Signaling Multi-Frame) are replaced by the value set in the X[0:2] bits (b3 & b1~0,
= 1: Disable the Extra bits to be replaced by the value set in the X[0:2] bits (b3 & b1~0, E1-06AH,...).
When the Basic frame is generated, this bit determines how to replace the International bit.
= 0: The International bit (Bit 1) of FAS frame and NFAS frame are replaced by the value set in the Si[1] (b0, E1-063H,...) and Si[0] bits (b1, E1-
= 1: Disable the International bit (Bit 1) of FAS frame and NFAS frame to be replaced by the value set in the Si[1] (b0, E1-063H,...) and Si[0] bits
When the CRC Multi-frame is generated, this bit, together with the FEBEDIS bit (b4, E1-062H,...) and the OOCMFV bit (b2, E1-04FH,...), deter-
.
When the CRC Multi-frame is generated, this bit, together with the SiDIS bit (b5, E1-062H,...) and the OOCMFV bit (b2, E1-04FH,...), determines
These bits are valid when the FDIS bit (b0, E1-062H,...) is 0. They control what kind of frame is generated:
SIGEN =1: signaling multiframe enable
GENCRC=1: CRC multiframe enable
CRCM=1: Modified CRC multiframe. This bit is only valid when GENCRC=1.
= 0: Enable the generation of the Basic frame, CRC Multi-Frame and Channel Associated Signaling (CAS) Multi-Frame.
= 1: Disable the generation of the Basic frame, CRC Multi-Frame and Channel Associated Signaling (CAS) Multi-Frame.
0
0
1
1
Reserved
7
OOCMFV (b2, E1-04FH,...)
XDIS
R/W
6
0
X
X
0
1
SiDIS
R/W
5
0
SiDIS (b5, E1-062H,...)
FEBEDIS
X
X
0
1
R/W
4
0
294
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
A single zero is inserted into the E bit when a CRC-4 Error event is
detected in the receive path. (the E1 bit corresponds to SMFI and the E2
bit corresponds to SMFII)
The value in the Si[1] bit (b0, E1-063H,...) is inserted into the E1 bit posi-
tion. The value in the Si[0] bit (b1, E1-063H,...) is inserted into the E2 bit
position.
The value in the Si[1] bit (b0, E1-063H,...) is inserted into the E1 bit posi-
tion. The value in the Si[0] bit (b1, E1-063H,...) is inserted into the E2 bit
position.
The E bit positions are unchanged.
CRCM
R/W
3
0
SIGEN
R/W
2
1
E Bits Insertion
GENCRC
R/W
1
1
August 20, 2009
FDIS
R/W
0
0