TXC-03401BITQ Transwitch Corporation, TXC-03401BITQ Datasheet - Page 14

• Manufacturer Part Number: TXC-03401BITQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03401BITQ

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

STUFD/HINT
FORCEOE
Symbol
STUFC
TFIN
FE
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Pin No.
68-Pin
PLCC
15
16
43
49
54
Pin No.
80-Pin
TQFP
67
68
20
27
33
I/O/P
O
O
O
I
I
TTLp
TTLp
Type
4mA
4mA
4mA
TTL
TTL
TTL
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DATA SHEET
Stuff Data Status / Hardware Interrupt: In the Nor-
mal mode of operation (EMODE=0), this pin performs
the Stuff Data Status function. This output pin pro-
vides an indication of the state of the stuff opportunity
bit from the receive DS3 frame when operating in the
M13 mode. For an M13 DS3 formatted signal, the first
stuff opportunity bit occurs in the first bit after F4 (last
85-bit group) in subframe 1, and the last stuff opportu-
nity bit in the frame occurs in the seventh bit after F4
(last 85-bit group) in subframe 7.
In the Extended-features mode of operation
(EMODE=1), this output pin can be used
(if HINTEN=1) to perform the Hardware Interrupt
function. It may be used as input to the interrupt pin of
the microprocessor. When at least one of the eight
interrupt enable mask bits (Address 11H, bits 7-0) is
1, occurrence of a corresponding alarm condition
causes the pin to go high. This pin is used to inform
the microprocessor that a severe alarm condition has
occurred. The Hardware Interrupt signal may be
changed to active low by setting control bit HINTINV
to 1.
Stuff Clock: Provided for clocking out the stuff oppor-
tunity bit state. The rising edge occurs at the start of
the second F-bit in a subframe and the falling edge
occurs at the end of the fifth 85-bit group.
Framing Error Indication: The FE pin will go high for
every F-bit or M-bit framing error. It stays high for a
period of 1.9 s (85 clock periods). During an Out of
Frame condition the FE pin is held low.
Transmit Framing Input: An optional active low input
signal which resets the counters of the Transmit
Frame Reference Generator block to zero and holds
the output signals of the block to their corresponding
states.
Force DS3 Overhead Bit Error: An active low signal
used in conjunction with the overhead enable signal
(OENA) for introducing an overhead bit error in the
next transmitted 85-bit group.
Name/Function
TXC-03401B
TXC-03401B-MB
Ed. 6, June 2001
DS3F