TXC-03401BITQ Transwitch Corporation, TXC-03401BITQ Datasheet - Page 38

• Manufacturer Part Number: TXC-03401BITQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03401BITQ

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 5V
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

Address
06
07
5-0
7-0
Bit
7
6
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Symbol
Receive
RXOOF
RXLOS
X2ERR
X1ERR
RXAIS
RXIDL
CERR
FEAC
NEW
FIDL
Data
LOC
Receive Single FEAC Word: Bit 7 (FIDL) is the FEAC idle channel indica-
tion. It clears whenever a zero C3 bit is received framing the six-bit variable
word. Bit 7 cannot be reset by a microprocessor read cycle. Bit 6 (NEW)
indicates when a new FEAC word has been detected. NEW is set when
the DS3F receives a FEAC message for five consecutive FEAC message
intervals (5 x 16 = 80 frames). It clears when the register is read. Bits 5-0
(FEAC receive data) constitute the variable (XXXXXX) field in the FEAC
word. A FEAC word is read in the field in the same order of being received
as shown below:
The following table lists possible FEAC combinations:
Note: There is no buffering for the received FEAC message. The latest,
validated FEAC message is provided and bit 6 (NEW) is set to one even if
the previous message is not read.
Latched-Bit Register: Bits 7-4 in this location are the latched values of
the corresponding bits in location 00H. All of the bits in this register latch
and are cleared on a read cycle, but RXAIS maintains its value when the
DS3F is in TR loopback or no TX terminal input is present. Bit 3 (CERR)
latches when the DS3F receives a C1 bit equal to zero. Bit 2 (LOC) latches
when either an RXLOC (bit 3 - 00H) or an TXLOC (bit 2 - 00H) occurs. The
X2ERR and X1ERR bits (bits 1 and 0) are latched at the inverse of the
XRX2 and XRX1 values (normally 1), so they are normally 0, and a value
of 1 indicates an error in the corresponding received X-bit.
FIDL
0
1
0
1
NEW
- 38 of 54 -
0
0
1
1
DATA SHEET
Bit 7
0 X X X X X X
FEAC channel busy - No message received since
last read cycle
FEAC channel idle - No message received since
last read cycle
New message received - FEAC channel busy
New message received - FEAC channel idle
16-Bit FEAC Word
X X X X X X
Description
0
1 1 1 1 1 1 1 1
06H
Status
TXC-03401B
TXC-03401B-MB
Ed. 6, June 2001
DS3F