LAN9218I-MT Standard Microsystems (SMSC), LAN9218I-MT Datasheet - Page 85

LAN9218I-MT

Manufacturer Part Number
LAN9218I-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9218I-MT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant

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0
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC LAN9218i
5.3.16
5.3.17
31-16
BITS
BITS
15-0
31:0
Reserved
General Purpose Timer Current Count (GPT_CNT). This 16-bit field
reflects the current value of the GP Timer.
Word Swap. This field only has significance if the device is operated in 16-
bit mode. In 32-bit mode, D[31:15] is always mapped to the high order word
and D[15:0] is always mapped to the low order word. In 16-bit mode, if this
field is set to 00000000h, or anything except 0xFFFFFFFFh, the LAN9218i
maps words with address bit A[1]=1 to the high order words of the CSRs
and Data FIFOs, and words with address bit A[1]=0 to the low order words
of the CSRs and Data FIFOs. If this field is set to 0xFFFFFFFFh, the
LAN9218i maps words with address bit A[1]=1 to the low order words of the
CSRs and Data FIFOs, and words with address bit A[1]=0 to the high order
words of the CSRs and Data FIFOs.
Note:
GPT_CNT-General Purpose Timer Current Count Register
This register reflects the current value of the GP Timer.
WORD_SWAP—Word Swap Control
This register controls how words from the host data bus are mapped to the CSRs and Data FIFOs
inside the LAN9218i. The LAN9218i always sends data from the Transmit Data FIFO to the network
so that the low order word is sent first, and always receives data from the network to the Receive Data
FIFO so that the low order word is received first.
Offset:
Offset:
Please refer to
Operation"
for additional information.
Section 3.6.1, "32-bit vs. 16-bit Host Bus Width
DESCRIPTION
DESCRIPTION
90h
98h
DATASHEET
85
Size:
Size:
32 bits
32 bits
NASR
TYPE
TYPE
R/W
RO
RO
Revision 2.7 (03-15-10)
00000000h
DEFAULT
DEFAULT
FFFFh
-

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