LAN9211-ABZJ Standard Microsystems (SMSC), LAN9211-ABZJ Datasheet - Page 100

• Manufacturer Part Number: LAN9211-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9211-ABZJ

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

Revision 2.7 (03-15-10)
BITS
0
Flow Control on Any Frame (FCANY). When this bit is set, the LAN9211
will assert back pressure, or transmit a pause frame when the AFC level is
reached and any frame is received. Setting this bit enables full-duplex flow
control when the LAN9211 is operating in full-duplex mode.
When this mode is enabled during half-duplex operation, the Flow Controller
does not decode the MAC address and will send a pause frame upon
receipt of a valid preamble (i.e., immediately at the beginning of the next
frame after the RX data FIFO level is reached).
When this mode is enabled during full-duplex operation, the Flow Controller
will immediately instruct the MAC to send a pause frame when the RX data
FIFO level is reached. The MAC will queue the pause frame transmission
for the next available window.
Setting this bit overrides bits [3:1] of this register.
[19:16]
Ah
Bh
Ch
Dh
Eh
Fh
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Table 5.5 Backpressure Duration Bit Mapping
DESCRIPTION
100Mbs Mode
DATASHEET
100uS
150uS
200uS
250uS
300uS
350uS
400uS
450uS
500uS
550uS
600uS
10uS
15uS
25uS
50uS
5uS
High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
100
BACKPRESSURE DURATION
10Mbs Mode
102.2uS
152.2uS
202.2uS
252.2uS
302.2uS
352.2uS
402.2uS
452.2uS
502.2uS
552.2uS
602.2uS
TYPE
12.2uS
17.2uS
27.2uS
52.2uS
7.2uS
R/W
DEFAULT
SMSC LAN9211
Datasheet
0