EMC2303-1-KP-TR Standard Microsystems (SMSC), EMC2303-1-KP-TR Datasheet - Page 33

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EMC2303-1-KP-TR

Manufacturer Part Number
EMC2303-1-KP-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of EMC2303-1-KP-TR

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
12
Lead Free Status / RoHS Status
Compliant
ADDR
ADDR
32h
42h
52h
Multiple RPM-Based PWM Fan Controller for Three Fans
Datasheet
31h
41h
51h
SMSC EMC2303
5.8
5.9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The PWM Divide registers determine the final frequency of the respective PWM Fan Driver. Each driver
base frequency is divided by the value of the respective PWM Divide Register to determine the final
frequency. The duty cycle settings are not affected by these settings, only the final frequency of the
PWM driver. A value of 00h will be decoded as 01h.
The Fan Configuration 1 registers control the general operation of the RPM-based Fan Speed Control
Algorithm used for the respective Fan Driver.
Bit 7 - EN_ALGOx - enables the RPM-based Fan Speed Control Algorithm.
Bits 6- 5 - RANGEx[1:0] - Adjusts the range of reported and programmed tachometer reading values.
The RANGE bits determine the weighting of all TACH values (including the Valid TACH Count, TACH
Target, and TACH reading) as shown in
PWM Divide Registers
Fan Configuration 1 Registers
1
0
0
‘0’ - (default) the control circuitry is disabled and the fan driver output is determined by the Fan
Driver Setting Register.
‘1’ - the control circuitry is enabled and the Fan Driver output will be automatically updated to
maintain the programmed fan speed as indicated by the TACH Target Register.
Configuration 1
Configuration 1
Configuration 1
Fan 1 Divide
Fan 2 Divide
Fan 3 Divide
REGISTER
REGISTER
RANGEX[1:0]
Fan 1
Fan 2
Fan 3
Table 5.10 Fan Configuration 1 Registers
128
128
128
B7
ALGO1
ALGO2
ALGO3
EN_
EN_
EN_
Table 5.9 PWM Divide Registers
B7
Table 5.11 Range Decode
0
0
1
B6
64
64
64
DATASHEET
RANGE1[1:0]
RANGE2[1:0]
RANGE3[1:0]
B6
Table
B5
32
32
32
33
B5
5.11.
B4
16
16
16
REPORTED MINIMUM
EDGES1[1:0]
EDGES2[1:0]
EDGES3[1:0]
B4
1000 (default)
B3
8
8
8
RPM
500
B3
B2
4
4
4
B2
UPDATE1[2:0]
UPDATE2[2:0]
UPDATE3[2:0]
B1
2
2
2
B1
Revision 1.2 (03-22-10)
TACH COUNT
MULTIPLIER
B0
1
1
1
B0
1
2
DEFAULT
DEFAULT
01h
01h
01h
2Bh
2Bh
2Bh

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