HBLXT9785HE.B2 Intel, HBLXT9785HE.B2 Datasheet - Page 87

• Manufacturer Part Number: HBLXT9785HE.B2
• Manufacturer: Intel

Specifications of HBLXT9785HE.B2

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 31
Cortina Systems
JTAG Test Signal Descriptions – BGA23
®
1. Type Column Coding: I = Input, O = Output, OD = Open Drain, TS = Three-State-able output, SMT =
2. The IP/ID resistors are disabled during H/W Power-Down mode. If a pin is an output or an I/O, the IP/ID
3. TDO output is three-stated in H/W Power-Down mode and during H/W reset.
BGA23
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
M16
M17
N14
N15
N16
Designation
Schmitt Triggered input, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-
Down.
resistors are also disabled when the output is enabled.
Ball/Pin
PQFP
167
168
169
170
171
TRST_L
Symbol
TDO
TMS
TCK
TDI
I, ST, IP
I, ST, IP
I, ST, ID
I, ST, IP
Type
O, TS
1
Signal Description
Test Data Input.
Test data sampled with respect to the rising edge of TCK.
Test Data Output.
Test data driven with respect to the falling edge of TCK.
Test Mode Select.
Test Clock.
Clock input for JTAG test.
Test Reset.
Reset input for JTAG test.
2,3
3.4 BGA23 Signal Descriptions
Page 87