DP83848KSQ National Semiconductor, DP83848KSQ Datasheet - Page 15

• Manufacturer Part Number: DP83848KSQ
• Manufacturer: National Semiconductor

Specifications of DP83848KSQ

• Lead Free Status / RoHS Status: Not Compliant

2.0 Configuration
This section includes information on the various configura-
tion options available with the DP83848K. The configura-
tion options described below include:
— Auto-Negotiation
— PHY Address and LED
— Half Duplex vs. Full Duplex
— Isolate mode
— Loopback mode
— BIST
2.1 AUTO-NEGOTIATION
The Auto-Negotiation function provides a mechanism for
exchanging configuration information between two ends of
a link segment and automatically selecting the highest per-
formance mode of operation supported by both devices.
Fast Link Pulse (FLP) Bursts provide the signalling used to
communicate Auto-Negotiation abilities between two
devices at each end of a link segment. For further detail
regarding Auto-Negotiation, refer to Clause 28 of the IEEE
802.3u specification. The DP83848K supports four differ-
ent Ethernet protocols (10 Mb/s Half Duplex, 10 Mb/s Full
Duplex, 100 Mb/s Half Duplex, and 100 Mb/s Full Duplex),
so the inclusion of Auto-Negotiation ensures that the high-
est performance protocol will be selected based on the
advertised ability of the Link Partner. In DP83848K, the
Auto-Negotiation function can be controlled either by inter-
nal register access or by the use of AN0 and AN1 pins.
2.1.1 Auto-Negotiation Pin Control
The state of AN0 and AN1 pins determine the specific
mode advertised by the device as given in Table 1.. The
state of AN0 and AN1 pins, upon power-up/reset, deter-
mines the state of bits [8:5] of the ANAR register.
The Auto-Negotiation function selected at power-up or
reset can be changed at any time by writing to the Basic
Mode Control Register (BMCR) at address 0x00h
AN1
Table 1. Auto-Negotiation Modes in DP83848K
0
0
1
1
AN0
0
1
0
1
10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
10BASE-T, Half-Duplex
100BASE-TX, Half-Duplex
10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
Advertised Mode
15
2.1.2 Auto-Negotiation Register Control
When Auto-Negotiation is enabled, the DP83848K trans-
mits the abilities programmed into the Auto-Negotiation
Advertisement register (ANAR) at address 04h via FLP
Bursts. Any combination of 10 Mb/s, 100 Mb/s, Half-
Duplex, and Full Duplex modes may be selected.
Auto-Negotiation Priority Resolution:
— (1) 100BASE-TX Full Duplex (Highest Priority)
— (2) 100BASE-TX Half Duplex
— (3) 10BASE-T Full Duplex
— (4) 10BASE-T Half Duplex (Lowest Priority)
The Basic Mode Control Register (BMCR) at address 00h
provides control for enabling, disabling, and restarting the
Auto-Negotiation process. When Auto-Negotiation is dis-
abled, the Speed Selection bit in the BMCR controls
switching between 10 Mb/s or 100 Mb/s operation, and the
Duplex Mode bit controls switching between full duplex
operation and half duplex operation. The Speed Selection
and Duplex Mode bits have no effect on the mode of oper-
ation when the Auto-Negotiation Enable bit is set.
The Link Speed can be examined through the PHY Status
Register (PHYSTS) at address 10h after a Link is
achieved.
The Basic Mode Status Register (BMSR) indicates the set
of available abilities for technology types, Auto-Negotiation
ability, and Extended Register Capability. These bits are
permanently set to indicate the full functionality of the
DP83848K (only the 100BASE-T4 bit is not set since the
DP83848K does not support that function).
The BMSR also provides status on:
— Completion of Auto-Negotiation
— Occurrence of a remote fault as advertised by the Link
— Establishment of a valid link
— Support for Management Frame Preamble suppression
The Auto-Negotiation Advertisement Register (ANAR)
indicates the Auto-Negotiation abilities to be advertised by
the DP83848K. All available abilities are transmitted by
default, but any ability can be suppressed by writing to the
ANAR. Updating the ANAR to suppress an ability is one
way for a management agent to change (restrict) the tech-
nology that is used.
The
(ANLPAR) at address 05h is used to receive the base link
code word as well as all next page code words during the
negotiation. Furthermore, the ANLPAR will be updated to
either 0081h or 0021h for parallel detection to either 100
Mb/s or 10 Mb/s respectively.
The Auto-Negotiation Expansion Register (ANER) indi-
cates additional Auto-Negotiation status. The ANER pro-
vides status on:
— Occurrence of a Parallel Detect Fault
— Next Page function support by the Link Partner
— Next page support function by DP83848K
— Reception of the current page that is exchanged by Auto-
— Auto-Negotiation support by the Link Partner
Partner
Negotiation
Auto-Negotiation
Link
Partner
Ability
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