XC5VLX30-1FFG324C Xilinx Inc, XC5VLX30-1FFG324C Datasheet - Page 238

FPGA, VIRTEX-5 LX, 30K, 324FBGA

XC5VLX30-1FFG324C

Manufacturer Part Number
XC5VLX30-1FFG324C
Description
FPGA, VIRTEX-5 LX, 30K, 324FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr

Specifications of XC5VLX30-1FFG324C

No. Of Logic Blocks
4800
Family Type
Virtex-5
No. Of Speed Grades
1
Total Ram Bits
1179648
No. Of I/o's
220
Clock Management
DCM, PLL
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Number Of Logic Elements/cells
30720
Number Of Labs/clbs
2400
Number Of I /o
220
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-BBGA, FCBGA
Core Supply Voltage Range
1V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-AFX-FF324-500-G - BOARD DEV VIRTEX 5 FF324
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1558

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Manufacturer
Quantity
Price
Part Number:
XC5VLX30-1FFG324C
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Part Number:
XC5VLX30-1FFG324C
Manufacturer:
Xilinx Inc
Quantity:
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Chapter 6: SelectIO Resources
238
Virtex-5 FPGA I/O Resource VHDL/Verilog Examples
The allowed values for the DIFF_TERM attribute are:
To specify the DIFF_TERM attribute, set the appropriate value in the generic map (VHDL)
or inline parameter (Verilog) of the instantiated IBUFDS or IBUGDS component. Please
refer to the ISE Language Templates or the Virtex-5 FPGA HDL Libraries Guide for the
proper syntax for instantiating this component and setting the DIFF_TERM attribute.
The VHDL and Verilog example syntaxes to declare a standard for Virtex-5 FPGA I/O
resources are found in the Virtex-5 FPGA Libraries Guide.
TRUE
FALSE (Default)
www.xilinx.com
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010

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