PIC12LF1822T-I/SN Microchip Technology, PIC12LF1822T-I/SN Datasheet - Page 124

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PIC12LF1822T-I/SN

Manufacturer Part Number
PIC12LF1822T-I/SN
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets

Specifications of PIC12LF1822T-I/SN

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12LF1822T-I/SN
Manufacturer:
MICROCHIP
Quantity:
3 900
Part Number:
PIC12LF1822T-I/SN
0
PIC12F/LF1822/PIC16F/LF1823
REGISTER 12-2:
REGISTER 12-3:
DS41413B-page 124
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-4
bit 3
bit 2-0
U-0
U-0
Writes to PORTA are actually written to corresponding LATA register. Reads from PORTA register is return
of actual I/O pin values.
Unimplemented: Read as ‘0
RA<5:0>: PORTA I/O Value bits
1 = Port pin is > V
0 = Port pin is < V
Unimplemented: Read as ‘0
TRISA<5:4>: PORTA Tri-State Control bits
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
TRISA3: RA3 Port Tri-State Control bit
This bit is always ‘1’ as RA3 is an input only
TRISA<2:0>: PORTA Tri-State Control bits
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
U-0
U-0
PORTA: PORTA REGISTER
TRISA: PORTA TRI-STATE REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-x/x
R/W-1/1
TRISA5
IH
IL
RA5
R/W-1/1
R/W-x/x
TRISA4
(1)
RA4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
TRISA3
R-x/x
R-1/1
RA3
R/W-1/1
R/W-x/x
TRISA2
RA2
 2010 Microchip Technology Inc.
R/W-1/1
R/W-x/x
TRISA1
RA1
R/W-1/1
R/W-x/x
TRISA0
RA0
bit 0
bit 0

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