PIC12LF1822T-I/SN Microchip Technology, PIC12LF1822T-I/SN Datasheet - Page 337
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PIC12LF1822T-I/SN
Manufacturer Part Number
PIC12LF1822T-I/SN
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Specifications of PIC12LF1822T-I/SN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12LF1822T-I/SN
Manufacturer:
MICROCHIP
Quantity:
3 900
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MOVWI
Syntax:
Operands:
Operation:
Status Affected:
Description:
2010 Microchip Technology Inc.
Mode
Preincrement
Predecrement
Postincrement
Postdecrement
Move W to INDFn
[ label ] MOVWI ++FSRn
[ label ] MOVWI --FSRn
[ label ] MOVWI FSRn++
[ label ] MOVWI FSRn--
[ label ] MOVWI k[FSRn]
n [0,1]
mm [00,01, 10, 11]
-32 k 31
W INDFn
Effective address is determined by
• FSR + 1 (preincrement)
• FSR - 1 (predecrement)
• FSR + k (relative offset)
After the Move, the FSR value will be
either:
• FSR + 1 (all increments)
• FSR - 1 (all decrements)
Unchanged
This instruction is used to move data
between W and one of the indirect
registers (INDFn). Before/after this
move, the pointer (FSRn) is updated by
pre/post incrementing/decrementing it.
Note: The INDFn registers are not
physical registers. Any instruction that
accesses an INDFn register actually
accesses the register at the address
specified by the FSRn.
FSRn is limited to the range 0000h -
FFFFh. Incrementing/decrementing it
beyond these bounds will cause it to wrap
around.
The increment/decrement operation on
FSRn WILL NOT affect any Status bits.
None
Syntax
FSRn++
FSRn--
++FSRn
--FSRn
PIC12F/LF1822/PIC16F/LF1823
mm
00
01
10
11
Preliminary
NOP
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
OPTION
Syntax:
Operands:
Operation:
Status Affected:
Description:
RESET
Syntax:
Operands:
Operation:
Status Affected:
Description:
Load OPTION_REG Register
with W
[ label ] OPTION
None
(W) OPTION_REG
None
Move data from W register to
OPTION_REG register.
Software Reset
[ label ] RESET
None
Execute a device Reset. Resets the
nRI flag of the PCON register.
None
This instruction provides a way to
execute a hardware Reset by soft-
ware.
No Operation
[ label ]
None
No operation
None
No operation.
1
1
NOP
NOP
DS41413B-page 337
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