PIC12LF1822T-I/SN Microchip Technology, PIC12LF1822T-I/SN Datasheet - Page 313
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PIC12LF1822T-I/SN
Manufacturer Part Number
PIC12LF1822T-I/SN
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Specifications of PIC12LF1822T-I/SN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12LF1822T-I/SN
Manufacturer:
MICROCHIP
Quantity:
3 900
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27.0
The Capacitive Sensing (CPS) module allows for an
interaction with an end user without a mechanical
interface. In a typical application, the CPS module is
attached to a pad on a Printed Circuit Board (PCB),
which is electrically isolated from the end user. When the
end user places their finger over the PCB pad, a
capacitive load is added, causing a frequency shift in the
CPS module. The CPS module requires software and at
least one timer resource to determine the change in
frequency. Key features of this module include:
• Analog MUX for monitoring multiple inputs
• Capacitive sensing oscillator
• Multiple Power modes
• High power range with variable voltage references
• Multiple timer resources
• Software control
• Operation during Sleep
FIGURE 27-1:
2010 Microchip Technology Inc.
CPS4
CPS5
CPS6
CPS7
Note 1:
CPS0
CPS1
CPS2
CPS3
CAPACITIVE SENSING (CPS)
MODULE
(1)
(1)
(1)
(1)
2:
Reference CPSCON1 register
If CPSON = 0, disabling capacitive sensing, no channel is selected.
CAPACITIVE SENSING BLOCK DIAGRAM
CPSCH<3:0>
CPSON
Ref-
(2)
0
1
Capacitive
Oscillator
CPSOSC
CPSRM
Sensing
DAC
Ref+
CPSRNG<1:0>
PIC12F/LF1822/PIC16F/LF1823
(Register
CPSON
0
1
FVR
Ref.
Int.
27-2) for channels implemented on each device.
T0CKI
Preliminary
T0XCS
CPSOUT
CPSCLK
0
1
F
OSC
SYNCC1OUT
SYNCC2OUT
T1GSEL<1:0>
T1CS<1:0>
/4
T1OSC/
F
F
T1CKI
T1G
OSC
OSC
0
1
/4
TMR0CS
Timer0 Module
TMR0
Timer1 Module
Control Logic
Timer1 Gate
EN
TMR1H:TMR1L
Overflow
DS41413B-page 313
TMR0IF
Set
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