PIC18F43K20-E/MV Microchip Technology, PIC18F43K20-E/MV Datasheet - Page 238

8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB

PIC18F43K20-E/MV

Manufacturer Part Number
PIC18F43K20-E/MV
Description
8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F43K20-E/MV

Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC18F2XK20/4XK20
FIGURE 18-2:
The operation of the EUSART module is controlled
through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These
Register 18-2 and Register 18-3, respectively.
For all modes of EUSART operation, the TRIS control
bits corresponding to the RX/DT and TX/CK pins should
be set to ‘1’. The EUSART control will automatically
reconfigure the pin from input to output, as needed.
When the receiver or transmitter section is not enabled
then the corresponding RX or TX pin may be used for
general purpose input and output.
DS41303G-page 238
BRG16
Baud Rate Generator
SPBRGH
registers
SPBRG
RX/DT pin
are
+ 1
EUSART RECEIVE BLOCK DIAGRAM
detailed
Multiplier
BRG16
SYNC
BRGH
Pin Buffer
and Control
in
1 X 0 0
X 1 1 0
X 1 0 1
x4
Register 18-1,
x16 x64
F
OSC
0
0
0
n
Data
Recovery
÷ n
FERR
Stop
MSb
CREN
(8)
RX9D
7
RX9
RSR Register
 2010 Microchip Technology Inc.
RCREG Register
• • •
OERR
8
1
RCIF
RCIE
Data Bus
0
START
LSb
RCIDL
Interrupt
FIFO

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