PIC18F86J90T-I/PT Microchip Technology, PIC18F86J90T-I/PT Datasheet - Page 300

• Manufacturer Part Number: PIC18F86J90T-I/PT
• Description: Segmented LCD, 96KB Flash, 4KB RAM, 12 MIPS, NanoWatt 80 TQFP 12x12x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J90T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J90 FAMILY
22.1
There are eight modes of operation for the compara-
tors, shown in Figure 22-1. Bits, CM<2:0>, of the
CMCON register are used to select these modes. The
TRISF register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 22-1:
DS39933D-page 300
Comparator Outputs Disabled
CM<2:0> = 000
Two Independent Comparators
CM<2:0> = 010
Two Common Reference Comparators
CM<2:0> = 100
One Independent Comparator with Output
CM<2:0> = 001
RF2/AN7/C1OUT*/SEG20
A = Analog Input, port reads zeros always
* Setting the TRISF<2:1> bits will disable the comparator outputs by configuring the pins as inputs.
C2INA
C2INB
C1INA
C1INB
C1INA
C1INB
C1INB
C1INB
C2INA
C2INB
C1INA
C2INA
C2INB
C1INA
C2INA
C2INB
Comparator Configuration
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ‘0’)
Off (Read as ‘0’)
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off (Read as ‘0’)
D = Digital Input
Two Common Reference Comparators with Outputs
CM<2:0> = 101
Two Independent Comparators with Outputs
CM<2:0> = 011
Comparators Off (POR Default Value)
CM<2:0> = 111
Four Inputs Multiplexed to Two Comparators
CM<2:0> = 110
RF1/AN6/C2OUT*/SEG19
RF2/AN7/C1OUT*/
SEG20
RF1/AN6/C2OUT*/SEG19
RF2/AN7/C1OUT*/SEG20
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 28.0 “Electrical Characteristics”.
C1INA
C1INB
C2INA
C2INB
Note:
C1INA
C1INB
C2INA
C2INB
CIS (CMCON<3>) is the Comparator Input Switch
C1INB
C1INA
C2INA
C2INB
C1INB
C1INA
C2INA
C2INB
A
A
A
A
D
D
D
D
A
A
A
A
A
A
A
D
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
 2010 Microchip Technology Inc.
C1
C2
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C1
C2
C1OUT
C2OUT
From V
REF
C1OUT
C2OUT
module