PIC18F86J90T-I/PT Microchip Technology, PIC18F86J90T-I/PT Datasheet - Page 413

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PIC18F86J90T-I/PT

Manufacturer Part Number
PIC18F86J90T-I/PT
Description
Segmented LCD, 96KB Flash, 4KB RAM, 12 MIPS, NanoWatt 80 TQFP 12x12x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J90T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
67
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
FIGURE 28-6:
TABLE 28-11: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
 2010 Microchip Technology Inc.
Param.
30
31
32
33
34
38
39
No.
Note 1: To ensure device Reset, MCLR must be low for at least 2 T
Note:
Watchdog
Oscillator
Time-out
Time-out
I/O pins
Internal
Internal
PWRT
MCLR
Reset
Reset
Timer
POR
Symbol
T
T
T
T
T
T
T
V
WDT
OST
CSD
MC
PWRT
IOZ
IOBST
DD
Refer to Figure 28-3 for load conditions.
L
AND BROWN-OUT RESET REQUIREMENTS
MCLR Pulse Width (low)
Watchdog Timer Time-out Period
(no postscaler)
Oscillation Start-up Timer Period
Power-up Timer Period
I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
CPU Start-up Time
Time for INTOSC to Stabilize
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
33
Characteristic
32
1024 T
2 T
45.8
Min
3.4
CY
PIC18F87J90 FAMILY
OSC
34
65.5
Typ
200
T
30
4.0
10
10
CY
2
1
CY
1024 T
or 400 s, whichever is lower.
Max
85.2
4.6
OSC
31
Units
ms
ms
µs
µs
µs
µs
(Note 1)
T
Voltage Regulator
enabled and put to
sleep
OSC
DS39933D-page 413
34
Conditions
= OSC1 period

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