PIC18F86J90T-I/PT Microchip Technology, PIC18F86J90T-I/PT Datasheet - Page 326

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PIC18F86J90T-I/PT

Manufacturer Part Number
PIC18F86J90T-I/PT
Description
Segmented LCD, 96KB Flash, 4KB RAM, 12 MIPS, NanoWatt 80 TQFP 12x12x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J90T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
67
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87J90 FAMILY
TABLE 25-2:
DS39933D-page 326
300000h CONFIG1L
300001h CONFIG1H
300002h CONFIG2L
300003h CONFIG2H
300004h CONFIG3L
300005h CONFIG3H
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
File Name
2:
3:
4:
x = unknown, - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Values reflect the unprogrammed state as received from the factory and following Power-on Resets. In all other Reset
states, the configuration bytes maintain their previously programmed states.
The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if it
is accidentally executed.
This bit should always be maintained as ‘0’.
See Register 25-7 and Register 25-8 for DEVID values. These registers are read-only and cannot be programmed by
the user.
CONFIGURATION BITS AND DEVICE IDs
DEBUG
DEV10
DEV2
IESO
Bit 7
(2)
(2)
(2)
(2)
FCMEN
XINST
DEV1
DEV9
Bit 6
(2)
(2)
(2)
(2)
STVREN
DEV0
DEV8
Bit 5
(2)
(2)
(2)
(2)
LPT1OSC
REV4
DEV7
Bit 4
(2)
(2)
(2)
(2)
WDTPS3 WDTPS2 WDTPS1 WDTPS0
T1DIG
REV3
DEV6
Bit 3
(3)
FOSC2
REV2
DEV5
Bit 2
CP0
RTCOSC
FOSC1
REV1
DEV4
Bit 1
 2010 Microchip Technology Inc.
CCP2MX
WDTEN
FOSC0
REV0
DEV3
Bit 0
Unprogrammed
111- ---1
---- 01--
11-1 1111
---- 1111
---- --1-
---- ---1
xxxx xxxx
0000 10x1
Default/
Value
(1)
(4)
(4)

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