PIC18F96J60-I/PF Microchip Technology, PIC18F96J60-I/PF Datasheet - Page 186
![64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J60-I/PF
Manufacturer Part Number
PIC18F96J60-I/PF
Description
64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J60-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J60-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 186 of 480
- Download datasheet (8Mb)
PIC18F97J60 FAMILY
16.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
16.1.1
The CCPx/ECCPx modules utilize Timers 1, 2, 3 or 4,
depending on the mode selected. Timer1 and Timer3
are available to modules in Capture or Compare
modes, while Timer2 and Timer4 are available for
modules in PWM mode.
TABLE 16-1:
FIGURE 16-1:
DS39762E-page 186
Timer1 is used for all Capture
and Compare operations for
all CCPx modules. Timer2 is
used for PWM operations for
all CCPx modules. Modules
may
resource as a common time
base.
Timer3 and Timer4 are not
available.
CCPx/ECCPx Mode
ECCP1
ECCP2
ECCP3
TMR1
CCP4
CCP5
TMR2
T3CCP<2:1> = 00
Compare
share
Capture
CCPx Module Configuration
PWM
CCPx/ECCPx MODULES AND
TIMER RESOURCES
either
CCPx/ECCPx MODE – TIMER
RESOURCE
TMR3
TMR4
CCPx/ECCPx AND TIMER INTERCONNECT CONFIGURATIONS
timer
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for ECCP1
only (depending on selected
mode).
All other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base
Capture/Compare or PWM
modes.
Timer1 or Timer3
Timer1 or Timer3
Timer2 or Timer4
Timer Resource
ECCP1
TMR1
TMR2
T3CCP<2:1> = 01
share
if
they
either
ECCP2
ECCP3
TMR3
TMR4
CCP4
CCP5
are
timer
in
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for ECCP1
and ECCP2 only (depending
on the mode selected for each
module). Both modules may
use a timer as a common time
base if they are both in
Capture/Compare or PWM
modes.
The other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base
Capture/Compare or PWM
modes.
The assignment of a particular timer to a module is
determined by the timer to CCPx enable bits in the
T3CON register (Register 14-1, page 179). Depending
on the configuration selected, up to four timers may be
active at once, with modules in the same configuration
(Capture/Compare or PWM) sharing timer resources.
The possible configurations are shown in Figure 16-1.
16.1.2
The pin assignment for ECCP2 (Capture input,
Compare and PWM output) can change based on
device configuration. The CCP2MX Configuration bit
determines which pin ECCP2 is multiplexed to. By
default, it is assigned to RC1 (CCP2MX = 1). If the
Configuration bit is cleared, ECCP2 is multiplexed with
RE7 on 80-pin and 100-pin devices in Microcontroller
mode and RB3 on 100-pin devices in Extended
Microcontroller mode.
Changing the pin assignment of ECCP2 does not auto-
matically change any requirements for configuring the
port pin. Users must always verify that the appropriate
TRIS register is configured correctly for ECCP2
operation regardless of where it is located.
ECCP1
ECCP2
TMR1
TMR2
T3CCP<2:1> = 10
share
if
they
either
ECCP2 PIN ASSIGNMENT
ECCP3
TMR3
TMR4
CCP4
CCP5
are
timer
in
© 2009 Microchip Technology Inc.
Timer3 is used for all Capture
and Compare operations for
all CCPx modules. Timer4 is
used for PWM operations for
all CCPx modules. Modules
may
resource as a common time
base.
Timer1 and Timer2 are not
available.
TMR1
TMR2
T3CCP<2:1> = 11
share
either
ECCP1
ECCP2
ECCP3
TMR3
TMR4
CCP4
CCP5
timer
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