PIC18F96J60-I/PF Microchip Technology, PIC18F96J60-I/PF Datasheet - Page 209
![64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J60-I/PF
Manufacturer Part Number
PIC18F96J60-I/PF
Description
64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J60-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J60-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 209 of 480
- Download datasheet (8Mb)
18.0
All members of the PIC18F97J60 family of devices
feature an embedded Ethernet controller module. This
is a complete connectivity solution, including full imple-
mentations of both Media Access Control (MAC) and
Physical Layer transceiver (PHY) modules. Two pulse
transformers and a few passive components are all that
are required to connect the microcontroller directly to
an Ethernet network.
The Ethernet module meets all of the IEEE 802.3
specifications
twisted-pair network. It incorporates a number of
packet filtering schemes to limit incoming packets. It
also provides an internal DMA module for fast data
throughput and hardware assisted IP checksum calcu-
lations. Provisions are also made for two LED outputs
to indicate link and network activity.
A simple block diagram of the module is shown in
Figure 18-1.
FIGURE 18-1:
© 2009 Microchip Technology Inc.
Ethernet RAM
8-Kbyte
Buffer
ETHERNET MODULE
Ethernet
Buffer
Addresses
Buffer Pointers
for
Ethernet
10-BaseT
ETHERNET MODULE BLOCK DIAGRAM
Microcontroller SFRs
Arbiter
Ethernet
Data
ch2
ch0
ch1
EDATA
connectivity
8
MIRD/MIWR
MIREGADR
Ethernet
to
Control
a
ch0
ch1
Host Interface
IP Checksum
Flow Control
RXF (Filter)
DMA and
PIC18F97J60 FAMILY
RXBM
TXBM
The Ethernet module consists of five major functional
blocks:
1.
2.
3.
4.
5.
PHY Register Data
PHY Register Addresses
RX
TX
The PHY transceiver module that encodes and
decodes the analog data that is present on the
twisted-pair interface and sends or receives it
over the network.
The MAC module that implements IEEE 802.3
compliant MAC logic and provides Media
Independent Interface Management (MIIM) to
control the PHY.
An independent, 8-Kbyte RAM buffer for storing
packets that have been received and packets
that are to be transmitted.
An arbiter to control access to the RAM buffer
when requests are made from the microcontroller
core, DMA, transmit and receive blocks.
The register interface that functions as an inter-
preter of commands and internal status signals
between the module and the microcontroller’s
SFRs.
Microcontroller Data Bus
LEDA/LEDB Control
MAC
Interface
Interface
MIIM
MII
DS39762E-page 209
PHY
RX
TX
TPOUT+
TPOUT-
RBIAS
TPIN+
TPIN-
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