PIC18F96J60-I/PF Microchip Technology, PIC18F96J60-I/PF Datasheet - Page 401
![64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J60-I/PF
Manufacturer Part Number
PIC18F96J60-I/PF
Description
64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J60-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J60-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 401 of 480
- Download datasheet (8Mb)
TBLRD
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
© 2009 Microchip Technology Inc.
Q Cycle Activity:
operation
Decode
No
Q1
(Read Program
Table Read
TBLRD ( *; *+; *-; +*)
None
if TBLRD*,
(Prog Mem (TBLPTR)) → TABLAT;
TBLPTR – No Change
if TBLRD*+,
(Prog Mem (TBLPTR)) → TABLAT;
(TBLPTR) + 1 → TBLPTR
if TBLRD*-,
(Prog Mem (TBLPTR)) → TABLAT;
(TBLPTR) – 1 → TBLPTR
if TBLRD +*,
(TBLPTR) + 1 → TBLPTR;
(Prog Mem (TBLPTR)) → TABLAT
This instruction is used to read the contents
of Program Memory (P.M.). To address the
program memory, a pointer called Table
Pointer (TBLPTR) is used.
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory. TBLPTR
has a 2-Mbyte address range.
The TBLRD instruction can modify the value
of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
1
2
No operation
TBLPTR[0] = 0: Least Significant Byte of
TBLPTR[0] = 1: Most Significant Byte of
operation
Memory)
0000
No
Q2
0000
operation
operation
Program Memory Word
Program Memory Word
No
No
Q3
0000
No operation
operation
TABLAT)
(Write
nn=0 *
No
Q4
10nn
=1 *+
=2 *-
=3 +*
PIC18F97J60 FAMILY
TBLRD
Example 1:
Example 2:
Before Instruction
After Instruction
Before Instruction
After Instruction
TABLAT
TBLPTR
MEMORY(00A356h)
TABLAT
TBLPTR
TABLAT
TBLPTR
MEMORY(01A357h)
MEMORY(01A358h)
TABLAT
TBLPTR
Table Read (Continued)
TBLRD
TBLRD
*+ ;
+* ;
=
=
=
=
=
=
=
=
=
=
=
DS39762E-page 401
55h
00A356h
34h
34h
00A357h
AAh
01A357h
12h
34h
34h
01A358h
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