PIC18LF25K22-E/SS Microchip Technology, PIC18LF25K22-E/SS Datasheet - Page 363
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PIC18LF25K22-E/SS
Manufacturer Part Number
PIC18LF25K22-E/SS
Description
32KB, Flash, 1536bytes-RAM,8-bit Family,nanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF25K22-E/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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24.3.1
The program memory may be read to or written from
any location using the table read and table write
instructions. The device ID may be read with table
reads. The Configuration registers may be read and
written with the table read and table write instructions.
In normal execution mode, the CPn bits have no direct
effect. CPn bits inhibit external reads and writes. A block
of user memory may be protected from table writes if the
WRTn Configuration bit is ‘0’. The EBTRn bits control
table reads. For a block of user memory with the EBTRn
bit cleared to ‘0’, a table READ instruction that executes
from within that block is allowed to read. A table read
FIGURE 24-3:
2010 Microchip Technology Inc.
Results: All table writes disabled to Blockn whenever WRTn = 0
TBLPTR = 0008FFh
Register Values
PROGRAM MEMORY
CODE PROTECTION
PC = 001FFEh
PC = 005FFEh
TABLE WRITE (WRTn) DISALLOWED
Program Memory
Preliminary
TBLWT*
TBLWT*
instruction that executes from a location outside of that
block is not allowed to read and will result in reading ‘0’s.
Figures
read protection.
Note:
PIC18(L)F2X/4XK22
000000h
0007FFh
000800h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
.
24-3
Code protection bits may only be written
to a ‘0’ from a ‘1’ state. It is not possible to
write a ‘1’ to a bit in the ‘0’ state. Code pro-
tection bits are only set to ‘1’ by a full chip
erase or block erase function. The full chip
erase and block erase functions can only
be initiated via ICSP™ or an external
programmer.
through
Configuration Bit Settings
24-5
WRTB, EBTRB = 11
WRT0, EBTR0 = 01
WRT1, EBTR1 = 11
WRT2, EBTR2 = 11
WRT3, EBTR3 = 11
illustrate table write and table
DS41412D-page 363
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