PIC24FJ48GA004T-I/ML Microchip Technology, PIC24FJ48GA004T-I/ML Datasheet - Page 3
![16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24FJ48GA004T-I/ML
Manufacturer Part Number
PIC24FJ48GA004T-I/ML
Description
16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ48GA004T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- Current page: 3 of 268
- Download datasheet (2Mb)
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with 4x PLL Option and
• 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16-Bit x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture:
• Two Address Generation Units for Separate Read
Special Microcontroller Features:
• Operating Voltage Range of 2.0V to 3.6V
• 5.5V Tolerant Input (digital pins only)
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
• Flash Program Memory:
• Power Management modes:
• Fail-Safe Clock Monitor Operation:
• On-Chip, 2.5V Regulator with Tracking mode
• Power-on Reset (POR), Power-up Timer (PWRT)
• Flexible Watchdog Timer (WDT) with On-Chip,
• In-Circuit Serial Programming™ (ICSP™) and
• JTAG Boundary Scan Support
2010 Microchip Technology Inc.
16GA002
32GA002
48GA002
64GA002
16GA004
32GA004
48GA004
64GA004
PIC24FJ
Device
Multiple Divide Options
- 76 base instructions
- Flexible addressing modes
and Write Addressing of Data Memory
- 10,000 erase/write
- 20-year data retention minimum
- Sleep, Idle, Doze and Alternate Clock modes
- Operating current 650 A/MIPS typical at 2.0V
- Sleep current 150 nA typical at 2.0V
- Detects clock failure and switches to on-chip,
and Oscillator Start-up Timer (OST)
Low-Power RC Oscillator for Reliable Operation
In-Circuit Debug (ICD) via 2 Pins
28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
low-power RC oscillator
28
28
28
28
44
44
44
44
16K
32K
48K
64K
16K
32K
48K
64K
4K
8K
8K
8K
4K
8K
8K
8K
16
16
16
16
26
26
26
26
PIC24FJ64GA004 FAMILY
5
5
5
5
5
5
5
5
Remappable Peripherals
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
Analog Features:
• 10-Bit, up to 13-Channel Analog-to-Digital Converter:
• Dual Analog Comparators with Programmable
Peripheral Features:
• Peripheral Pin Select:
• 8-Bit Parallel Master/Slave Port (PMP/PSP):
• Hardware Real-Time Clock/Calendar (RTCC):
• Programmable Cyclic Redundancy Check (CRC)
• Two 3-Wire/4-Wire SPI modules (support 4 Frame
• Two I
• Two UART modules:
• Five 16-Bit Timers/Counters with Programmable Prescaler
• Five 16-Bit Capture Inputs
• Five 16-Bit Compare/PWM Outputs
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to 4 External Interrupt Sources
- 500 ksps conversion rate
- Conversion available during Sleep and Idle
Input/Output Configuration
- Allows independent I/O mapping of many peripherals
- Up to 26 available pins (44-pin devices)
- Continuous hardware integrity checking and safety
- Up to 16-bit multiplexed addressing, with up to
- Programmable polarity on control lines
- Provides clock, calendar and alarm functions
modes) with 8-Level FIFO Buffer
mode and 7-Bit/10-Bit Addressing
- Supports RS-485, RS-232, and LIN 1.2
- On-chip hardware encoder/decoder for IrDA
- Auto-wake-up on Start bit
- Auto-Baud Detect
- 4-level deep FIFO buffer
interlocks prevent unintentional configuration changes
11 dedicated address pins on 44-pin devices
2
2
2
2
2
2
2
2
2
C™ modules support Multi-Master/Slave
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
10
10
10
10
13
13
13
13
DS39881D-page 3
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
®
Y
Y
Y
Y
Y
Y
Y
Y
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