PIC24FJ48GA004T-I/ML Microchip Technology, PIC24FJ48GA004T-I/ML Datasheet - Page 44
![16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC24FJ48GA004T-I/ML
Manufacturer Part Number
PIC24FJ48GA004T-I/ML
Description
16-bit Family, 16 MIPS, 48KB Flash, 8192 Bytes RAM, 35 I/O, NanoWatt 44 QFN 8x8x
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ48GA004T-I/ML
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- Current page: 44 of 268
- Download datasheet (2Mb)
TABLE 4-22:
TABLE 4-23:
TABLE 4-24:
RCON
OSCCON
CLKDIV
OSCTUN
Legend:
Note
NVMKEY
Legend:
Note
PMD1
PMD2
PMD3
Legend:
File Name
File Name
NVMCON
Name
File
1:
2:
1:
Addr
0740
0742
0744
0748
Addr
Addr
0760
0766
0770
0772
0774
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values are dependent on type of Reset.
OSCCON register Reset values are dependent on configuration fuses and by type of Reset.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TRAPR
CLOCK CONTROL REGISTER MAP
NVM REGISTER MAP
PMD REGISTER MAP
Bit 15
Bit 15
Bit 15
T5MD
ROI
—
—
WR
—
—
—
IOPUWR
COSC2
DOZE2
Bit 14
WREN
Bit 14
Bit 14
T4MD
—
—
—
—
COSC1
DOZE1
WRERR
Bit 13
Bit 13
Bit 13
T3MD
—
—
—
—
—
COSC0
DOZE0
Bit 12
IC5MD
Bit 12
Bit 12
T2MD
—
—
—
—
—
DOZEN
Bit 11
IC4MD
T1MD
Bit 11
Bit 11
—
—
—
—
—
—
RCDIV2
NOSC2
CMPMD RTCCMD
Bit 10
IC3MD
Bit 10
Bit 10
—
—
—
—
—
RCDIV1
NOSC1
IC2MD
Bit 9
CM
Bit 9
Bit 9
—
—
—
—
VREGS
RCDIV0
NOSC0
PMPMD CRCPMD
IC1MD
Bit 8
Bit 8
Bit 8
—
—
—
—
CLKLOCK IOLOCK
I2C1MD
EXTR
Bit 7
Bit 7
Bit 7
—
—
—
—
ERASE
U2MD
SWR
Bit 6
Bit 6
Bit 6
—
—
—
—
SWDTEN
U1MD
LOCK
TUN5
Bit 5
Bit 5
Bit 5
—
—
—
—
SPI2MD
OC5MD
WDTO
TUN4
Bit 4
Bit 4
Bit 4
NVMKEY<7:0>
—
—
—
—
NVMOP3 NVMOP2 NVMOP1 NVMOP0 0000
SPI1MD
OC4MD
SLEEP
TUN3
Bit 3
Bit 3
Bit 3
CF
—
—
OC3MD
TUN2
Bit 2
IDLE
Bit 2
Bit 2
—
—
—
—
SOSCEN
OC2MD
I2C2MD
TUN1
Bit 1
BOR
Bit 1
Bit 1
—
—
ADC1MD
OSWEN (Note 2)
OC1MD
TUN0
Bit 0
POR
Bit 0
Bit 0
—
—
(Note 1)
Resets
Resets
Resets
0000
3140
0000
0000
0000
0000
All
All
All
(1)
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