PIC24FJ64GA106-E/MR Microchip Technology, PIC24FJ64GA106-E/MR Datasheet - Page 157

16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 64 QFN 9x9x0.9mm TUBE

PIC24FJ64GA106-E/MR

Manufacturer Part Number
PIC24FJ64GA106-E/MR
Description
16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet

Specifications of PIC24FJ64GA106-E/MR

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC24FJ256GA110
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
12.0
The Timer2/3 and Timer4/5 modules are 32-bit timers,
which can also be configured as four independent 16-bit
timers with selectable operating modes.
As 32-bit timers, Timer2/3 and Timer4/5 can each
operate in three modes:
• Two independent 16-bit timers with all 16-bit
• Single 32-bit timer
• Single 32-bit synchronous counter
They also support these features:
• Timer Gate Operation
• Selectable Prescaler Settings
• Timer Operation during Idle and Sleep modes
• Interrupt on a 32-Bit Period Register Match
• ADC Event Trigger (Timer2/3 only)
Individually, all four of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the ADC event trigger;
this is implemented only with Timer3. The operating
modes and enabled features are determined by setting
the appropriate bit(s) in the T2CON, T3CON, T4CON
and T5CON registers. T2CON and T4CON are shown
in generic form in
are shown in
For 32-bit timer/counter operation, Timer2 and Timer4
are the least significant word; Timer3 and Timer4 are
the most significant word of the 32-bit timers.
 2010 Microchip Technology Inc.
Note:
operating modes (except Asynchronous Counter
mode)
Note:
TIMER2/3 AND TIMER4/5
Section 14. “Timers” (DS39704).
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
For 32-bit operation, T3CON and T5CON
control bits are ignored. Only T2CON and
T4CON control bits are used for setup and
control. Timer2 and Timer4 clock and gate
inputs are utilized for the 32-bit timer
modules, but an interrupt is generated
with the Timer3 or Timer5 interrupt flags.
Register
Register
12-2.
Family
12-1; T3CON and T5CON
Reference
Manual”,
PIC24FJ256GA110 FAMILY
To configure Timer2/3 or Timer4/5 for 32-bit operation:
1.
2.
3.
4.
5.
6.
The timer value, at any point, is stored in the register
pair: TMR3:TMR2 (or TMR5:TMR4). TMR3 (TMR5)
always contains the most significant word of the count,
while TMR2 (TMR4) contains the least significant word.
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the T32 bit (T2CON<3> or T4CON<3> = 1).
Select the prescaler ratio for Timer2 or Timer4
using the TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits. If TCS is set to external clock,
RPINRx (TxCK) must be configured to an avail-
able RPn pin. See Section 10.4 “Peripheral
Pin Select” for more information.
Load the timer period value. PR3 (or PR5) will
contain the most significant word of the value
while PR2 (or PR4) contains the least significant
word.
If interrupts are required, set the interrupt enable
bit, T3IE or T5IE; use the priority bits, T3IP<2:0>
or T5IP<2:0>, to set the interrupt priority. Note
that while Timer2 or Timer4 controls the timer,
the interrupt appears as a Timer3 or Timer5
interrupt.
Set the TON bit (= 1).
Clear the T32 bit corresponding to that timer
(T2CON<3>
T4CON<3> for Timer4 and Timer5).
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits. See Section 10.4 “Peripheral
Pin Select” for more information.
Load the timer period value into the PRx register.
If interrupts are required, set the interrupt enable
bit, TxIE; use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit (TxCON<15> = 1).
for
Timer2
and
DS39905E-page 157
Timer3
or

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