ISP1301BS,151 NXP Semiconductors, ISP1301BS,151 Datasheet - Page 14

• Manufacturer Part Number: ISP1301BS,151
• Description: RF Transceiver USB OTG TRANSCEIVER
• Manufacturer: NXP Semiconductors

Specifications of ISP1301BS,151

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Supply Voltage: 1.65 V to 4.5 V
• Lead Free Status / RoHS Status: Compliant
• Other names: 935273168151 ISP1301BS-S

Philips Semiconductors
ISP1301_3
Product data sheet
8.4.1 Transparent general-purpose buffer mode
8.4.2 Transparent UART mode
8.2 Direct I
8.3 USB modes
8.4 Transparent modes
In direct I
communicates with the serial controller through the SCL and SDA lines. The serial
controller has a built-in I
In this mode, an external I
(Status, Control, Interrupt, and so on) through the I
The supported I
The ISP1301 is in direct I
OE_N/INT_N is de-asserted.
The four USB modes of the ISP1301 are:
In VP_VM USB mode, the DAT/VP pin is used for the VP function, the SE0/VM pin is used
for the VM function, and the RCV pin is used for the RCV function.
In DAT_SE0 USB mode, the DAT/VP pin is used for the DAT function, the SE0/VM pin is
used for the SE0 function, and the RCV pin is not used.
In unidirectional mode, the DAT/VP and SE0/VM pins are always inputs. In bidirectional
mode, the direction of these signals depends on the OE_N/INT_N input.
Table 6
The ISP1301 is in USB mode when both the TRANSP_EN and UART_EN bits are
cleared.
In transparent general-purpose buffer mode, the DAT/VP and SE0/VM pins are connected
to the DP and DM pins, respectively. Using bits TRANSP_BDIR1 and TRANSP_BDIR0 of
the Mode Control 2 register as specified in
transfer. The ISP1301 is in transparent general-purpose buffer mode if bit
TRANSP_EN = 1 and bit DAT_SE0 = 1.
When in transparent UART mode, the ATX behaves as two logic level translator between
the following pins:
•
•
•
•
•
•
VP_VM unidirectional mode
VP_VM bidirectional mode
DAT_SE0 unidirectional mode
DAT_SE0 bidirectional mode
For the TxD signal: from SE0/VM (V
For the RxD signal: from DP (+3.3 V level) to DAT/VP (V
specifies the functionality of the device during the four USB modes.
2
2
C-bus mode, an external I
C-bus mode
2
C-bus bit rate is 100 kbit/s (maximum).
Rev. 03 — 21 February 2006
2
C-bus slave function.
2
2
C-bus mode when either bit TRANSP_EN bit = 0 or pin
C-bus master can access the internal registers of the device
2
C-bus master (OTG Controller) directly
CC(I/O)
Table
level) to DM (+3.3 V level).
8, you can control the direction of data
2
C-bus interface.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
CC(I/O)
USB OTG transceiver
level).
ISP1301
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