AM50DL128CG70I AMD (ADVANCED MICRO DEVICES), AM50DL128CG70I Datasheet - Page 9

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AM50DL128CG70I

Manufacturer Part Number
AM50DL128CG70I
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM50DL128CG70I

Lead Free Status / RoHS Status
Supplier Unconfirmed
PIN DESCRIPTION
A21–A0
DQ15–DQ0
CE#f1
CE#f2
CE1#ps
CE2ps
OE#
WE#
RY/BY#1
RY/BY#2
UB#
LB#
RESET#1
RESET#2
WP#/ACC
V
V
V
NC
8
CC
CC
SS
f
ps
= 22 Address Inputs (Common)
= 16 Data Inputs/Outputs (Common)
= Chip Enable 1 (Flash 1)
= Chip Enable 2 (Flash 2)
= Chip Enable 1 (pSRAM)
= Chip Enable 2 (pSRAM)
= Output Enable (Common)
= Write Enable (Common)
= Ready/Busy Output (Flash 1)
= Ready/Busy Output (Flash 2)
= Upper Byte Control (pSRAM)
= Lower Byte Control (pSRAM)
= Hardware Reset Pin, Active Low
= Hardware Reset Pin, Active Low
= Hardware Write Protect/
= Flash 3.0 volt-only single power sup-
= pSRAM Power Supply
= Device Ground (Common)
= Pin Not Connected Internally
(Flash 1)
(Flash 2)
Acceleration Pin (Flash)
ply (see Product Selector Guide for
speed options and voltage supply
tolerances)
P R E L I M I N A R Y
Am50DL128CG
LOGIC SYMBOL
22
RESET#2
CE#f1
CE#f2
CE1#ps
CE2ps
OE#
WE#
WP#/ACC
RESET#1
UB#
LB#
A21–A0
DQ15–DQ0
RY/BY#1
RY/BY#2
November 7, 2002
16

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