S71PL129JB0BAW9Z0 Spansion Inc., S71PL129JB0BAW9Z0 Datasheet - Page 60
S71PL129JB0BAW9Z0
Manufacturer Part Number
S71PL129JB0BAW9Z0
Description
Manufacturer
Spansion Inc.
Datasheet
1.S71PL129JB0BAW9Z0.pdf
(153 pages)
Specifications of S71PL129JB0BAW9Z0
Lead Free Status / RoHS Status
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58
RY/BY#: Ready/Busy#
DQ6: Toggle Bit I
Notes:
1. VA = Valid address for programming. During a sector erase operation, a valid address is
2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to V
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is in the read mode, the standby mode, or one of the banks is in the
erase-suspend-read mode.
Table 14
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm
is in progress or complete, or whether the device has entered the Erase Suspend
mode. Toggle Bit I may be read at any address, and is valid after the rising edge
of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
any sector address within the sector being erased. During chip erase, a valid address is
any non-protected sector address.
with DQ5.
shows the outputs for RY/BY#.
Figure 6. Data# Polling Algorithm
CC
S71PL129JC0/S71PL129JB0/S71PL129JA0
No
.
A d v a n c e
Read DQ7–DQ0
Read DQ7–DQ0
DQ7 = Data?
DQ7 = Data?
Addr = VA
Addr = VA
DQ5 = 1?
START
FAIL
No
Yes
No
Yes
Yes
I n f o r m a t i o n
PASS
S71PL129Jxx_00_A8 October 28, 2005
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