PCA9632DP1-T NXP Semiconductors, PCA9632DP1-T Datasheet - Page 12

• Manufacturer Part Number: PCA9632DP1-T
• Description: LED Drivers 4-BIT FM+I2C-BUS LOW POWER LED
• Manufacturer: NXP Semiconductors

Specifications of PCA9632DP1-T

• Number Of Segments: 4
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Package Type: TSSOP
• Pin Count: 8
• Mounting: Surface Mount
• Power Dissipation: 400mW
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 5.5V
• Low Level Output Current: 100000 uA
• Operating Supply Voltage: 2.3 V to 5.5 V
• Maximum Supply Current: 150 uA
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Compliant
• Other names: PCA9632DP1,118

NXP Semiconductors
PCA9632_3
Product data sheet
7.3.3 PWM registers 0 to 3, PWMx — Individual brightness control registers
Table 8.
Legend: * default value.
While operating in Individual brightness mode (LDRx = 10), a 1.5625 kHz fixed frequency
signal is used for each output. Duty cycle is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = LED output at maximum
brightness). In this mode, all the 8 bits are used.
E.g., if IDCx[7:0] = 1111 1111, then duty cycle = 255 / 256 = 99.6 %.
While operating in group dimming mode, a 6.25 kHz fixed frequency signal is used for
each output. Duty cycle is controlled through 64 linear steps from 00h (0 % duty cycle =
LED output off) to 3Fh (98.4 % duty cycle = LED output at maximum brightness). In this
mode only the 6 MSBs are used (IDCx[7:2]). The 2 LSBs IDCx[1:0] are ignored.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT register).
E.g., if IDCx[7:2] = 111111, then duty cycle = 1111 1100 / 256 = 252 / 256 = 98.4 %.
While operating in blink mode, a 1.5625 kHz fixed frequency signal is used for each
output. Duty cycle is controlled through 256 linear steps from 00h (0 % duty cycle = LED
output off) to FFh (99.6 % duty cycle = LED output at maximum brightness). In this mode,
all the 8 bits are used.
E.g., if IDCx[7:0] = 1111 1111, then duty cycle = 255 / 256 = 99.6 %.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT register).
duty cycle
duty cycle
duty cycle
Address
02h
03h
04h
05h
Register
PWM0
PWM1
PWM2
PWM3
PWM0 to PWM3 - PWM registers 0 to 3 (address 02h to 05h) bit description
=
=
=
-------------------------- -
-----------------------------------
-------------------------- -
IDCx 7:0
IDCx 7:2 ,00
IDCx 7:0
256
256
256
Bit
7:0
7:0
7:0
7:0
Rev. 03 — 15 July 2008
Symbol
IDC0[7:0]
IDC1[7:0]
IDC2[7:0]
IDC3[7:0]
Access Value
R/W
R/W
R/W
R/W
4-bit Fm+ I
0000 0000* PWM0 Individual Duty Cycle
0000 0000* PWM1 Individual Duty Cycle
0000 0000* PWM2 Individual Duty Cycle
0000 0000* PWM3 Individual Duty Cycle
2
C-bus low power LED driver
Description
PCA9632
© NXP B.V. 2008. All rights reserved.
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