LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 115

no-image

LPC47M107S-MS

Manufacturer Part Number
LPC47M107S-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M107S-MS

Pin Count
100
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC47M107S-MS
Manufacturer:
SMSC
Quantity:
3 000
Part Number:
LPC47M107S-MS
Manufacturer:
Standard
Quantity:
1 036
Part Number:
LPC47M107S-MS
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LPC47M107S-MS
Manufacturer:
SMSC
Quantity:
20 000
The following register describes the functionality to support security in the LPC47M10x.
GPIO Device Disable Register Control
The GPIO pin GP43 is used for the Device Disable Register Control (DDRC) function. Setting bits[3:2] of the GP43
configuration register to ‘01’, selects the DDRC function for the GP43 pin. When bits[3:2]=01 the GP43 pin is an
input, with non-inverted polarity. Bits[3:2] cannot be cleared by writing to these bits; they are cleared by VTR POR,
VCC POR and Hard Reset. That is, when the DDRC function is selected for this pin, it cannot be changed, except by a
VCC POR, hard reset or VTR POR.
When the DDRC function is selected for GP43, the Device Disable register is controlled by the value of the GP43 pin
as follows:
Device Disable Register
The Device Disable Register is located in the PME register block at offset 0x22 from the PME_BLK base I/O address
in logical device A. Writes to this register are blocked when the GP43 pin is configured for the Device Disable
Register Control function (GP43 configuration register bit 2 =1) and the GP43 pin is high.
The configuration register for the device disable register is defined in the “Runtime Registers” section.
GAME PORT LOGIC
The LPC47M10x implements logic to support a dual game port. This logic includes the following for each game port:
two 555 timers, two game port RC constant inputs (x-axis and y-axis), two game port button inputs and game port
interface logic. The implementation of the Game Port uses a simple A/D converter constructed from a 555 timer to
digitize the analog value of a potentiometer for the x-axis and y-axis of the joystick.
The figure below illustrates the implementation of the game port logic in the LPC47M10x.
Game software will write a byte to the game port to reset it, and then poll (read) the port until the x and y-axis RC time
constant pins (TIMA,B) time out (return to zero). The elapsed time indicates the resistance value of the potentiometer
and in turn, the position of the joystick.
If the GP43 pin is high, the Device Disable Register is Read-Only.
If the GP43 pin is low, the Device Disable Register is Read/Write.
JOYW
JOYR
Game Port
Register
Internal To LPC47M10x
D0
D1
D2
D3
D4
D5
D6
D7
SECURITY FEATURE
OUT1A
OUT1B
OUT2A
OUT2B
TRIG1A
TRIG1B
TRIG2A
TRIG2B
Page 115
556
556
TIM1A
TIM1B
TIM2A
TIM2B
J1X
J1Y
J2X
J2Y
J1B1
J1B2
J2B1
J2B2
Vcc = 5V
X-Axis
Y-Axis
X-Axis
Y-Axis
Internal To Joysticks
Vcc = 5V
Vcc = 5V
Vcc = 5V
Vcc = 5V
Joystick 1 Button 1
Joystick 1 Button 2
Joystick 2 Button 1
Joystick 2 Button 2
Joystick 1
Joystick 2

Related parts for LPC47M107S-MS