LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 26

• Manufacturer Part Number: LPC47M107S-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M107S-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

Normal Floppy Mode
Normal mode. Register 3F3 contains only bits 0 and 1. When this register is read, bits 2 - 7 are ‘0’.
Enhanced Floppy Mode 2 (OS2)
Register 3F3 for Enhanced Floppy Mode 2 operation.
DATA RATE SELECT REGISTER (DSR)
Address 3F4 WRITE ONLY
This register is write only. It is used to program the data rate, amount of write precompensation, power down status, and
software reset. The data rate is programmed using the Configuration Control Register (CCR) not the DSR, for PC/AT
and PS/2 Model 30.
Other applications can set the data rate in the DSR. The data rate of the floppy controller is the most recent write of
either the DSR or CCR. The DSR is unaffected by a software reset. A hardware reset will set the DSR to 02H, which
corresponds to the default precompensation setting and 250 Kbps.
BIT 0 and 1 DATA RATE SELECT
These bits control the data rate of the floppy controller. See Table 8 for the settings corresponding to the individual data
rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps after a hardware reset.
Bit 7
REG 3F3
REG 3F3 Reserved Reserved
Note:
X
X
X
1
0
DIGITAL OUTPUT REGISTER
Bit 6
X
X
X
1
0
RESET
L0-CRF2-Bx = Logical Device 0, Configuration Register F2, Bit x.
COND.
DIGITAL OUTPUT REGISTER
DB7
DB7
Bit 5
0
X
X
X
1
0
Bit 1
0
0
1
1
RESET
Table 5 - Internal 2 Drive Decode - Drives 0 and 1 Swapped
S/W
Bit 4
7
0
X
X
X
1
0
DB6
DB6
0
POWER
DOWN
Bit1
X
0
0
1
1
Table 6 - Drive Type ID
6
0
Bit 0
0
1
0
1
DB5
DB5
Bit 0
Drive Type ID
0
X
0
1
0
1
5
0
0
DRIVE SELECT OUTPUTS
nDS1
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DB4
DB4
COMP2
0
1
1
1
1
0
(ACTIVE LOW)
L0-CRF2 - B1
L0-CRF2 - B3
L0-CRF2 - B5
L0-CRF2 - B7
PRE-
REGISTER 3F3 - DRIVE TYPE ID
4
0
Bit 5
Floppy Boot Drive
DB3
DB3
COMP1
0
PRE-
nDS0
3
0
1
0
1
1
1
COMP0
DB2
DB2
PRE-
0
L0-CRF2 - B0
L0-CRF2 - B2
L0-CRF2 - B4
L0-CRF2 - B6
2
0
MOTOR ON OUTPUTS
nMTR1
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
Bit 4
(ACTIVE LOW)
tape sel1
tape sel1
DRATE
SEL1
DB1
DB1
1
1
DRATE
SEL0
nMTR0
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
tape sel0
tape sel0
0
0
DB0
DB0